Valkuilen in CDM tester calibratieprocedures

Theo Smedes, Arjan van IJzerloo, Michal Polewski, Jean Luc Lefebvre,

Marcel Dekker

Pitfalls for CDM calibration procedures

Theo Smedes, Arjan van IJzerloo, Michal Polewski, Jean Luc Lefebvre,

Marcel Dekker

2010 EOS/ESD Symposium

Proceedings EOS/ESD Symposium, pp. 341-348, 2010

Objectives

● Demonstrate pitfalls in CDM calibration procedures

● Calibration results depend heavily on

− Selected calibration equipment

− Calibration targets

− Procedures

● Propose improved calibration procedure

● Demonstrate results with new procedure

● Note: all data in presentation is for ESDA/AEC standard, similar arguments hold for JEDEC

Slide 3

Outline

● Introduction

● Analysis

− Experiments

− Waveform analysis

− Calibration targets

● Proposal for Solution

● Results

● Conclusions

Slide 4

What is ESD?• ElectroStatic Discharge:

sudden, short, electric current when charge, stored on insulated object, finds path to object at different electrical potential

• 2 ESD mechanisms for ICs– Charge builds up on person/tool & transfers to IC– Charge builds up on IC and transfers to other object

• The result is a short, high current peak– 100 ps to 100 ns duration– Up to 10’s A peak current

How do you protect an IC against ESD?• Add circuitry such that:

– core of design is not affected by the ESD currents and voltages for any ESD event

– functionality of core is minimally affected• ESD protection network (lightning rods)• ESD Protections must be robust and efficient

– Robust: able to sink required ESD current– Efficient 1: Correct trigger voltage– Efficient 2: Clamp voltage low enough– Efficient 3: Fast enough

How do you assess ESD sensitivity?• Qualify products by stressing according to several standards

• Different standards try to address different events:– Human Body Model: A person discharges to an IC– Charged Device Model: A charged IC discharges to its

environment– System Level ESD: A person discharges through a

tool to equipment

• In all cases:– models only cover a limited part of ‘real life ESD’– discharge waveforms/procedures are described in standards– Product functionality is tested before and after stress

Standards• Several standards have been developed for specification,

benchmarking and data exchange• These standards prescribe pulse forms, test levels, test

sequences, pass/fail criteria etc.• Most important organizations:

– ESDA: Electrostatic Discharge Association– JEDEC Solid State Technology Association– AEC: Automotive Electronics Council– JEITA: Japan Electronics and Information Technology

Industries Association• Most standards define classification,

but do not prescribe required levels

Charged Device Model

• Four main CDM standards are in place: JEDEC, AEC, ESDA, JEITA

– ESDA is best developed standard– JEDEC is the most commonly used standard– AEC is used for automotive applications

• Unfortunately significant differences– Parts tested with different standards can

deliver a factor of 2 difference in the CDM voltage passing levels for the same part

• This method exists for all standards• Differences are: insulator, calibration modules,

discharge head impedance, …

Field Induced, Non-socketed CDM

CDM Waveforms & Calibration• Discharge specified calibration target• Measure discharge waveform for specified voltage• Compare with specifications for peak current, etc.• If necessary: tune tester by changing .ini file:

– programmed vs. applied voltage– linearity

Insulator

Copper disc

Introduction• Product qualified in 3 different labs• Pass/fail levels differed considerably from lab-to-lab:

• All labs were within limits of theESDA and AEC CDM standards

• Labs had identical ESD controlprocedures

• All labs used same tester typeSlide 12

Lab Pass Level (V)

Fail Level (V)

A 750 1000B 500 750C 250 500

1 GHzLab Spec MeasA 5.4B 4.7C 5.2

4.5 (±20%)

Measured waveforms• 500 V discharge on small ESDA module• >3 GHz scopes

• Large differences, in line with pass/fail of product• Not in line with 1 GHz measurements

Slide 13

-4-202468

10

0E+00 1E-09 2E-09 3E-09Time (s)

Cur

rent

(A) Lab A

Lab BLab C

Fourier analysis (1)• Fourier Transform shows waveforms measured with

high bandwidth scope contain > 1 GHz components• A simple low pass filter can be calculated such that:

filtered 6GHz spectrum = measured 1 GHz spectrum

Slide 14

0

0.2

0.4

0.6

0.8

0E+00 2E+09 4E+09 6E+09Frequency (Hz)

Am

plitu

de

6 GHz spectrum,measured1 GHz spectrum,measured1 GHz spectrum,filtered from 6 GHz

0

0.2

0.4

0.6

0.8

0E+00 2E+09 4E+09 6E+09Frequency (Hz)

Am

plitu

de

6 GHz spectrum,measured1 GHz spectrum,measured1 GHz spectrum,filtered from 6 GHz

Fourier analysis (2)• This filter is characteristics for the 1 GHz procedure• Inverse Transform gives calculated 1 GHz waveform• Good match is obtained• This procedure was repeated for each lab

Slide 15

-4-202468

0E+00 1E-09 2E-09 3E-09Time (s)

Cur

rent

(A) 6 GHz measured

1 GHz measuredfiltered

Comparison of the labs (1)• Predicted filter characteristics for each lab • Labs have totally different characteristics

– Characteristic frequency– Role-off

Slide 16

0.01

0.1

1

1E+07 1E+08 1E+09 1E+10Frequency (Hz)

Am

plitu

deLab ALab BLab C

Comparison of the labs (2)• Frequency response of 2 scopes measured• Scope 1 agrees with the filter calculated for lab A• Scope 2 agrees with the filter calculated for lab B• Lab A uses scope 1, lab B does NOT use scope 2.

Slide 17

Scope 2 is a brand/type mentioned in standard

0.01

0.1

1

1E+07 1E+08 1E+09 1E+10Frequency (Hz)

Am

plitu

deLab ALab BScope 1Scope 2

0.01

0.1

1

1E+07 1E+08 1E+09 1E+10Frequency (Hz)

Am

plitu

deLab ALab BScope 1Scope 2

0.01

0.1

1

1E+07 1E+08 1E+09 1E+10Frequency (Hz)

Am

plitu

deLab ALab BScope 1Scope 2

Discussion (1)• Not all 1 GHz scopes are equal• Scope frequency response affects results significantly

• So even if labs have identical 1 GHz peak current, >3 GHz peak currents may be significantly different

• Consequently actual stress experienced by products is significantly different

• Real stress: scope frequency response is irrelevant• Thus: use highest bandwidth to bring tester on spec.

Slide 18

Calibration modules (1)• Capacitance measurements• Differences between modules exist• Modules are not always flat

Slide 19

Module Small Large#1 #2 #3 #4

C(pF), w/o pressure 4.12 2.9 2.92 26.12C(pF), w/I pressure 4.43 4.38 4.4 31.6

Max gap (µm) <1 47 60 14FR-4 thickness (µm) 704 744 747 716

• Differences between labs exist• Only 1 of used modules is in spec. • All modules were original• Target peak current can be compensated for

difference between true capacitance and specified capacitance

Lab A Lab BC (pF)

SpecificationC (pF)

Measured Ratio C (pF) Measured Ratio

Small 4±5% 4.63 1.16 4.37 1.09Large 30±5% 33.5 1.13 30.7 1.02

Calibration modules (2)

Slide 20

Repeatability issues• Graph shows standard deviation of Ipeak for 2 shifts• After a product qualification, 30 samples of 64 pins,

the Ipeak showed a 30%-60% decrease• After pogo pin cleaning normal values were found

Slide 21

0

2

4

6

8

-2000 -1000 0 1000 2000V_CDM (V)

StD

ev I_

peak

(%) Shift 1

Shift 2

Discussion (2)• Capacitance value impacts calibration current value• Calibration setting impacts stress current for product

– C to be measured in same situation as stressing

• Standards state: out-of-spec modules can not be used– But almost no modules are in spec

• Calibration can be compensated for C value– 4.63 pF: target current should be 16% higher than

current specified for the ideal 4 pF targetSlide 22

Discussion (3)• Demonstrated 2 mechanisms leading to systematic

differences between results of different testers • Tolerances in the standards are not intended to cover

these systematic differences– Tolerances cover random variations due to arc

properties, alignment issues, etc.

• Both problems can be solved in calibration procedure• We propose a new procedure on the next sheet

– in agreement with the intentions of the standards– solves the issues discussed

Slide 23

Proposal• Allow only > 3.5 GHz oscilloscope

– both for calibrations and verifications• Remove 1 GHz table from standards

• Define detailed capacitance measurement method for modules on charge plate

• Compensate target peak current for capacitance Δbetween actual and ideal calibration module

• Use 3.5 GHz table of existing ESDA standard• Define software filter for reporting 1 GHz data

Slide 24

Confirmation of new procedure (1)• Known product re-evaluated after re-calibration

– 3 samples per stress level• All labs have identical pass/fail level• Earlier result was too optimistic

Slide 25

0

1

2

3

0 250 500 750V_CDM (V)

#fai

ls

Lab A, oldLab A, newLab BLab C

0

1

2

3

0 250 500 750V_CDM (V)

#fai

ls

Lab A, oldLab A, newLab BLab C

: 350 V: 500 V

Confirmation of new procedure (2)• Same failure mode found for all• Plotted against peak current all fails are at same level

– Also old qualification! • Redesign easily solved this problem

Slide 26

Classical CDMfailure: X-domain

0

1

2

3

0 2 4 6 8 10I_CDM (A)

#fai

ls

Lab A, oldLab A, newLab BLab C

Conclusions• Existing calibration procedure leads to inconsistent

product qualification results– specification of behavior of oscilloscopes– calibration module specification

• Discharge surface contamination also causes inconsistency

• An improved procedure is proposed:– does not require new equipment or modules– demonstrated to yield consistent results

• Revision of the CDM standards should be consideredSlide 27

EOS/ESD Symposium next year: