8/6/2019 jcs23257-260 ok

1/5

Journal of Computer Science 2 (3): 257-260 , 2006

ISSN 1549-3636

2006 Science Publications

Design of a Neural Networks Classifier for Face

DetectionF. Smach, M. Atri, J. Mitran

and

M. Abid1 2 3 1

CES Laboratory of ENIS University, Sfax 3000,

Tunisia

1

The EE Laboratory of Science Monastir University, Monastir, 5000Tunisia

2

LE2I Laboratory of Universit de Bourgogne Aile des Sciences de l'Ingnieur,France

3

Abstract: Face detection and recognition has many applications in a variety of fields such as security

system, videoconferencing and identification. Face classification is currently implemented in software.

A hardware implementation allows real-time processing, but has higher cost and time to-market. The

objective of this work was to imp lement a classifier based on neural netwo rks MLP (Multi-layer

Perception) for face d etection. The MLP was used to classify face and non-face patterns. The system

described using C language on a P4 (2.4 Ghz) to extract weight values. Then a Hardware

implementation achieved using VHDL based Methodology. We targeted Xilinx FPGA as the

implementation supp ort.

Key words: Classificatio n, face detection, FPGA hardware description, MLP

Number..of.Missed.FalsesINTRODUCTION False negative =

Total.Number.of.Actual.Faces

Human Face detection and recognition is an activeNumber..of.Incorrectly.Detected.Faces

area of research spanning several disciplines such as False positive =Total.Number.of.Actual.Faces

image processing, pattern recognition and comp uter

vision. Face detection and recognition are preliminary Face detection can be viewed as two-class

steps to a wide range of app lications such as personal recognition problem in which an image regio n is

identity verification, vid eo-surveillance, liptro cking, classified as being a Face or nonFace.

facial expression extraction, gender classification, Consequently, face detection is o ne of the few attempts

advanced human and computer interactio n. Most to recognize from images a class of objects for which

methods are based on neural network approaches, there is a great deal of within-class variability. Face

feature extraction, Markov chain, skin color and others detection also provide interesting challenges to the[1]are based on template matching . underlying pattern classification and learning

Pattern localization and classification is the step techniques. The class of face and no face image arewhich is used to classify face and non-face patterns.

decidedly characterized by multimodal distributionMany systems dealing with object classification are

function and effective decision boundaries are likely to based on ANN (Artificial Neural Networks). In this

be nonlinear in the image space.study we were interested by the design of a ANN

Pattern localization and classification are CPU timealgorithm in order to achieve image classification.

intensive being normally implemented in software,

however with lower performance than customClassification for face detection: While numerousimplementations. Custom implementation in hardwaremethods have been proposed to detect face in a single

allows real-time processing, having higher cost andimage o f intensity or color images. A related and

important p roblem is how to evaluate the performance time-to-market than software implementation. Some

of the proposed detection methods . Many recent face[1] [2-4 ]workers uses ANN for classification and the system

detection papers compare the performance of severalis implemented in software, resulting in a poormethods, usually in terms of detection and false alarm performance (10 sec for localization and classification).

rates. It is also worth noticing that many metrics have [ 5]A similar work is presented , aiming to object been adopted to evaluate algorithms, such as learning

localization and classification and it was alsotime, execution time, the number o f samples required in

implemented in software (10-15 frames/sec). An ANNtraining and the ratio between detection rates and false

MLP was implemented on DSPs, standardalarms. In general, d etectors can make two types of

microprocessor and FPGA dedicated to imageerrors: false negatives in which faces are missed

[6] processing . The prop osed architecture is pipelinedresulting in low detection rates and false positives inand results are given for a 256x256 image.which an image is declared to be face.

Corresponding Author: F. Smach, CES Laboratory of ENIS University, Sfax 3000, Tunisia

25 7

8/6/2019 jcs23257-260 ok

2/5

J. Computer Sci., 2 (3):257-260, 2006

We are interested by the implementation of a ANN decision region arbitrarily well. Yet the convergence of

algorithm in order to provide image classification. The back propagation algorithms is still an open problem. It

MLP (Multi-layer Perception) algorithm is used to is well known that the time cost o f back propagation

classify face and non-face patterns before the training often exhibits a remarkable variability. It has

recognition step. been d emonstrated that, in most cases, rapid restart

method can prominently suppress the heavy-tailed[ 1]Multi-layers perception: The MLP neural network nature of training instances and improve efficiency of

has feedforword architecture within input layer, a computation.

hidden layer and an output layer. The input layer of this Multi-Layer Perception(MLP) with a back

network has N units for an N dimensional input vector. propagation learning algorithms was chosen for the

The input units are fully connected to the Ihidden layer propo sed system because of its simplicity and its

units, which are in turn, connected to the Joutput layers capability in supervised pattern matching. It has been

successfully applied to many pattern classificationunits, where Jis the number of outp ut classes.

problems . Our problem has been considered to be[9]A Multi-Layers Perception(MLP) is a particular of

artificial neural network . We will assume that we have suitable with the supervised rule since the pairs of[7 ]

access to a training dataset of lpairs (x , yi) where x is a input-output are available.i i

vector containing the pattern, while y is the class of the For training the network, we used the classicali

backpropagation algorithm. An example is picked fromcorresp ond ing pattern. In our case a 2-class task, y cani

be cod ed 1 and -1. the training set, the output is co mputed. The error is

calculated as the difference between the actual and the

desired output. It is minimized by back-propagating itX Tanh( (WX )-t1i i

and by adjusting the weights.X2.. Although back-propagation can be applied to+1

.

. network with any number of layers, it has been showntanh(y)

. that one layer of hidden units suffices to approximate(W-X)-t Output(-1 ;+1)i iany function . Therefore, in most application, a MLP[8 ]

-1 NNs with a single layer of hidden units is used with aXn

1sigmoid activation function for the units f(a) 1 e= +

- a[8]Fig.1: The neuron of supervised training

(2), this function has the interesting property o f having

an easy to compute derivativeWe consid ered a MLP (Multi-Layers Perceptron)[ ]f (a) f (a) 1 f (a)= - (3)with a 3 layers, the input layer is a vector constituted by '

2

n units of neurons ( nx n p ixel input images). The The MLP training is amount to: Repeatedlyhidden layer has n neurons and the output layer is a presented with sample inputs and desired targets, thensingle neuron which is active to 1 if the face is the output and targets are compared and the error

presented and to otherwise. measured. At last, adjusts weights until correct outputThe activity of a particular neuro n jin the hidden for every input.

layer is writing by: S = w x , x f (s )= (1 ), f aj j i i i j

i in p u

tInput Layer Hidden Layer Output Layer

sigmoid functio n.

Where W is the set of weights of neuron i,

b (i) is1i 1

Xthe threshold and x is an input of the neuron. Input Image 1i XSimilarly the output layer activity is: Matrix 15x 15

2

.

.S = w xj .ji i

.i in p ut

In our system, the dimension of the retina is 15x15 .X pixels represent human faces and non face, the input n

vector is constituted by 225 neurons, the hidden layer

has 15 neurons.Fig.2: Architecture of proposed systemThe examples were taken from the FERET

database. The MLP was trained on 500 face and 200Our aim is to implementHardware implementation:non-face examples.

an efficient model of unconstrained face tracking and

real time face detection in arbitrary images. ArtificialTraining methodology: The MLP with the training

Neural Networks (ANNs) have been proved to be analgorithm of back propagation is universal mappers,

effective way to solve this problem , but due to longwhich can in theory, approximate any continuous [9]

25 8

8/6/2019 jcs23257-260 ok

3/5

J. Computer Sci., 2 (3):257-260, 2006

Neuron 1RO M

Wi1

Neuron 2Out p ut l ay erRO M

Neu ronW ROMi2

W Ou t pu tOut putkMux

Re gi st e r. 15/1 16 16.8

.

.Neuron 15

CounterRO M

Wi 15

Co nt r ol Uni t

C o nt r ol Si g na l s

Re set C l k

Fig.3: Block diagram

time process in software implementation. However,

with todays design technology, we are given the chance F(x)= a x+ b for x [C , C ]i i i i + 1

to perform face detection at higher level, which F(x)= 1 for x > 3involves the real time domain. We are able to shift the

detection stage in hardware implementation, to achieve The W values, calculated in the training step, werei j

several advantages . The papers discuss other [ 10] [11, 12 ] stored in a ROM in each neuron. Every W coded withi j

methods implemented in a hardware implementation. 8 bits represents a fixed-point weight. The operation ofThe MLP implemented is a three-layer multiplication provide every time a result with 16 bits

perception(Fig. 2), one hidden layer and one output fraction.layer are used in this network system. The block A multiplexing bloc (Mux+counter) was used todiagram presented in Fig. 3 corresponds to the hardware provide one neuron output at each clock cycle to the

implementation of our system. It is constitutedof four next stage. The output layer neuron achieve the sameunits: input register bank, control unit, neuron and tasks as the other neurons before giving the outputoutput register. result.Computation of any activation neuron coefficient

may be executed by employing a multiply and RESULTSaccumulate method where partial product are computed

separately and subsequently added. Each neuron takes a This architecture was implemented using Matlab invector input of N patterns. Each vector component is a graphical environment allowing face detection in a

multiplied by a fixed weight value, which is determined database. It has been evaluated using the test data ofat training time by software implementation. Weights 500 images containing faces, on this test set we

are updated during the training process, but remain obtained a good detection, if the input image presentedconstant during the detection process. The result of the face the answer of the output neuron is rate of 0.9.

MAC operation is passed an input to a function These results encouraged us to implement thisactivation and returns the value of the hyperbolic architecture targeting a hardware device using a HDLtangent (tanh) between 1 and -1. based methodology.

In general, the process of designing a system will

This function implementation in hardware is very proceed from a behavioral to a physical representation,difficult in its known expression. In order to simplify gaining implementation details along the way. Highfunction expression, it was linearized on several level synthesis converts a behavioral specification of aintervals [C ,

C

] and its value is evaluated using two digital system into an equivalent RTL design that meetsi i + 1

constants (a and b ) corresponding to this interval. a set of stated performance constraint . The designer[1 3]i i

259

8/6/2019 jcs23257-260 ok

4/5

J. Computer Sci., 2 (3):257-260, 2006

describes his system with a high level specification at 4. Feraund, R., O.J. Bernier, J. Viallet and

M.one of abstraction levels. This description with a HDL Collobert, 2001. A fast and accurate face detector

(Hardware Description Language) is synthesized using based on neural network. IEEE Trans. Pattern

existent synthesis tool allowing passage to the next Analysis and Machine Intelligence, 23: 42-53.abstraction level until reaching either integration in 5. Gavrila, D.M. and V. Philomin, 1999. Real-

timeASIC or implementation in

FPGA.object detection for smart vehicles. Intl. Conf.

The system was implemented in VHDL

and

Computer Vision (ICCV99). Vol. 1. Corfu, Greece,

synthesized using Leonardo synthesis tool. Target 20-25 Sep.technology was FPGA Xilinx operating at 52 Mhz. The 6. Rolf, F.M., P.M. Engel, F.G. Moraes, L.Torres

andused device was a vertex v1000bg560. It contains M. Robert, 2001. System prototyping dedicated to12248 slices and was occupied at 99.67%. neural network real-time image processing.

ACM/SIGDA Ninth Intl. Symp. On

FieldCONCLUSION Programmable Gate Arrays (FPGA 2001).

7. Haisheng, W. and J. Zelek, 2003. A multi-classifierOur experiments have shown that using MLP based real-time face detection system. J. IEEEneural networks for face detection is a very promising Trans. Robotics and Automation.approach. The models robustness has been obtained 8. Fan, Y. and M. Paindavoine, 2003. Prefiltering forwith a back propagation learning algorithms and the pattern recognition using wavelet transform and

activation function. In our approach no pre-tanh neural networks. Adav. Imaging and Electron processing is needed since the normalization is Phys., Vol. 127.incorporated directly in the weights of the input 9. Xiaoguang, L. and S. Areibi, 2004.

Anetwork. hardware/software co-design approach for faceFace classification are normally implemented in

recognition. The 16th Intl. Conf. onhardware allowing real-time processing. Classification

Microelectronics, Tunisia.is a step which must be complemented with feature

10. Theocharis, T., G. Link, V. Narayanan and

M.J.extraction in order to demonstrate detection accuracy

Irwin, 2004. Embedded hardware face detection.and performances.

17th Intl. Conf. on VLSI Design, Mumbai,India.Jan. 5-9.

REFERENCE

S11. Fan, Y. and M. Paindavoine, 2003. Implementation

of an RBF neural network on embedded systems:1. Ming-Husan, Y., D.J. Kriegman and N.

Ahuja, Real-time face tracking and identity verification.2002. Detecting Faces in Images: A Survey. IEEEIEEE Trans. on Neural Networks, 14: 5.Trans. Pattern Analysis and Machine Intelligence,

12. McCready, R., 2000. Real-time face detection on a24: 1.configurable hardware system. Intl. Symp. on Field2. Rowley, H.A., S. Baluja and T. Kanade,

1998. Programmable Gate Arrays. Montery, California, Neural network-based face detection. IEEE Trans.United States.on Pattern Analysis and Machine Intelligence, 20:

13. Gajski, D., N. Dutt and A. Wu, 1992. High-

Level39-51.

Synthesis: Introduction to Chip and System Design.3. Zhang, Z.Q., Zhu L., S.Z. Li, Z.H. Jiang,

2002. Kluwer Academic Publishers, Boston.Real-time multi-view face detection. Proc. FifthIEEE Intl. Conf. on Automatic Face and

GestureRecognition, pp: 142-147.

260

8/6/2019 jcs23257-260 ok

5/5