Da_Vinci Processors

download Da_Vinci Processors

of 20

Transcript of Da_Vinci Processors

  • 8/2/2019 Da_Vinci Processors

    1/20

    1/11/20101/11/2010 SGGS I & ET,Nanded,INDIASGGS I & ET,Nanded,INDIA 1 1

    AN INTRODUCTION TOAN INTRODUCTION TO

    Da Vinci Da Vinci Da Vinci Da Vinci Da Vinci Da Vinci Da Vinci Da Vinci TechnologyTechnology

    Supervised by:Supervised by: Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye Dr. D.D.Doye

    Presented by: SYED MUFFASSIR M.S.ALI SYED MUFFASSIR M.S.ALI SYED MUFFASSIR M.S.ALI SYED MUFFASSIR M.S.ALI SGGS I & ET, NandedSGGS I & ET, Nanded

    DA VINCI and TIDA VINCI and TI are the trademarks of Texas Instruments Inc, USA.are the trademarks of Texas Instruments Inc, USA.

  • 8/2/2019 Da_Vinci Processors

    2/20

    ContentsContentsContentsContentsIntroductionBlock diagram of DaVinci ProcessorsImportant Features

    1/11/2010 SGGS I & ET,Nanded,INDIA 2

    Innovation Made EasyImplementation examples

    ImpactReferences

  • 8/2/2019 Da_Vinci Processors

    3/20

    What is DaVinci Technology?What is DaVinci Technology?What is DaVinci Technology?What is DaVinci Technology?

    Texas Instruments DaVinci Technologyis a new software technology that has

    1/11/2010 SGGS I & ET,Nanded,INDIA 3

    com ne so ware, ar ware, andevelopment tools to form a digitalsignal processing (DSP) system that

    enhances digital multimedia.

  • 8/2/2019 Da_Vinci Processors

    4/20

    Why was it developed?Why was it developed?Why was it developed?Why was it developed?

    To eliminate CODEC errors betweendifferent processors.To bring digital video to the

    1/11/2010 SGGS I & ET,Nanded,INDIA 4

    componen eve , ena ng eve opersto introduce digital video to anapplication without requiring

    developers to program a single line of DSP code.

  • 8/2/2019 Da_Vinci Processors

    5/20

    Why not FPGAs or ASICs?Why not FPGAs or ASICs?Why not FPGAs or ASICs?Why not FPGAs or ASICs?

    FPGAs require more Power and are notcompact.ASICs fails to achieve best quality

    1/11/2010 SGGS I & ET,Nanded,INDIA 5

    un er w e range o opera ngconditions and limits their ability toadapt to multiple applications.

    Development time required and time ismore.

  • 8/2/2019 Da_Vinci Processors

    6/20

    Processors: Digital video systemProcessors: Digital video systemProcessors: Digital video systemProcessors: Digital video system- ---onononon----chipschipschipschips

    TMS320DM6443 Video decode: Video

    Accelerator and Networking for displayTMS320DM6446 /7 Video encode/decode:Video Accelerator and Networking for (HD)capture and display

    DM6446

    DM6443

    1/11/2010 SGGS I & ET,Nanded,INDIA 6

    DVEVMDVEVMDVEVMDVEVMDigital Video

    Evaluation Module

    Tools:DaVinci Hardware and Software DevelopmentTools:DaVinci Hardware and Software DevelopmentTools:DaVinci Hardware and Software DevelopmentTools:DaVinci Hardware and Software Development

    DVSDKDVSDKDVSDKDVSDKDigital Video SoftwareDevelopment Kit

  • 8/2/2019 Da_Vinci Processors

    7/20

    Video Processing Subsystem

    Video Processing Subsystem

    TMS320DM644x ProcessorsVideo-Optimized TMS320C64x+DSP @ 810MHz

    H.264 MP@L3, 30fps SD DecodingVC1/WMV9 Full D1 SD DecodingMPEG-2 MP@ML SD DecodingMPEG-4 ASP Full D1 SD DecodingH.264 BP D1 EncodingSimultaneous H.264 BP CIF Coding

    Back End

    ARMSubsystem

    DSPSubsystem

    Video-ImagingCoprocessor (VICP)

    Front End

    CCD Controller Video Interface

    Resizer Histogram/3A

    Preview

    On-ScreenDisplay(OSD)

    10b DAC10b DAC10b DAC10b DAC

    DM6443

    ARM926EJ-S405 MHz

    CPU

    C64x+TMDSP810 MHz

    Core

    VideoEnc

    (VENC)

    /6

    1/11/2010 SGGS I & ET,Nanded,INDIA 7

    TMS320DM6446 $34.95

    2006 10KU Price:TMS320DM6443 $29.95

    Peripherals

    EDMA3.0

    ATA/Compact

    Flash

    Async EMIF/NAND/

    SmartMedia

    MMC/SD

    WatchdogTimer

    General-Purpose

    Timer

    DDR2Controller (16b/32b)

    USB2.0

    PHYVLYNQ

    EMACWith

    MDIO

    Connectivity

    Program/Data Storage

    SPI UARTUARTUARTI2C

    AudioSerialPort

    Serial Interfaces

    System

    Switched Central Resource (SCR)

    -system

    Back end - Integrated OSD,four video DACs, 24-bit digitalRGB output

    = New for DM644x= DM6446 additions

    Front end Resizer,Image processing engine,16-bit digital input

  • 8/2/2019 Da_Vinci Processors

    8/20

    Important Features of Important Features of Important Features of Important Features of DaVinciDaVinciDaVinciDaVinciProcessors.Processors.Processors.Processors.

    ARM Core + DSP Core.. Advanced Very-Long-Instruction-

    Word (VLIW) DSP Core.Image Processing Pipeline.Eight Functional Units : 6 ALUs(32/40 Bit),2 Multipliers of 16X16 bit Multiplies per clock cycle.

    1/11/2010 SGGS I & ET,Nanded,INDIA 8

    - genera urpose eg s ers.Video Processing Subsystem viz VPFE &VPBE.Speed of DSP:6480 MIPS.Memory ARM: 16K I-Cache, 8K D-Cache, 16KB RAM,

    8K ROM DSP: 32K L1 P-Cache, 32K L1 D-Cache,

    128K L2 Cache, 64K Boot ROM

  • 8/2/2019 Da_Vinci Processors

    9/20

    Video Processing Subsystem.Video Processing Subsystem.Video Processing Subsystem.Video Processing Subsystem.

    Video Processing Front EndVideo Processing Front EndVideo Processing Front EndVideo Processing Front End- ---1. CCD Controller(CCDC), a Preview Engine

    ( Previewer ), Histogram Module,

    1/11/2010 SGGS I & ET,Nanded,INDIA 9

    . Module (H3A), and

    3. Resizer.

    Video Processing Back EndVideo Processing Back EndVideo Processing Back EndVideo Processing Back End- ---1. On-Screen Display Engine (OSD)2. Video Encoder (VENC).

  • 8/2/2019 Da_Vinci Processors

    10/20

    How it becomes easy to Innovate?How it becomes easy to Innovate?How it becomes easy to Innovate?How it becomes easy to Innovate?

    Using Hardware and Software Toos likeDVEVM and DVSDK . . . .

    1. DVEVM has both hardware and software.

    1/11/2010 SGGS I & ET,Nanded,INDIA 10

    . based digital video systems quickly &efficiently.Open Source and Linux based.Fast Development with DaVinciDaVinciDaVinciDaVinci OnScreen Display.

  • 8/2/2019 Da_Vinci Processors

    11/20

    How it becomes easy to Innovate?How it becomes easy to Innovate?How it becomes easy to Innovate?How it becomes easy to Innovate?

    Software Tools1. Software development tool Code

    Composer Studio (CCS)

    1/11/2010 SGGS I & ET,Nanded,INDIA 11

    2. Two modes, Simulator and Emulator.3. Collection of optimized image/video

    processing functions

  • 8/2/2019 Da_Vinci Processors

    12/20

    Exploiting SoC (DaVinciExploiting SoC (DaVinciExploiting SoC (DaVinciExploiting SoC (DaVinci ) for) for) for) forReduced BOM.Reduced BOM.Reduced BOM.Reduced BOM.

    1/11/2010 SGGS I & ET,Nanded,INDIA 12

    Example: -PLUTO 3.0PLUTO 3.0PLUTO 3.0PLUTO 3.0Single Channel, Micro Networked Video SecurityProcessing Platform

    Courtesy: YMagic Inc, USA.

  • 8/2/2019 Da_Vinci Processors

    13/20

    Example:---PLUTO 3.0Single Channel, Micro Video Processing Platform

    10/100MBitEthernet

    AnalogVideo Out

    Analog

    ITU656 VideoDecoder(D/A)

    EthernetPHY

    VideoEncoder

    CMOSCamera

    I/F

    Value: DaVinciValue: DaVinciValue: DaVinciValue: DaVinci ProcessorsProcessorsProcessorsProcessorswith Reduced BOM.with Reduced BOM.with Reduced BOM.with Reduced BOM.

    DigitalMedia

    Processor

    1/11/2010 SGGS I & ET,Nanded,INDIA 13

    Video In (A/D)

    GLUE Logic(FPGA IDEcontroller)

    GLUE Logic(CPLDfor I/F)

    GLUE Logic(FPGA forMMC/SD

    Controller)

    USB

    ControllerHardDisk

    GLUE Logic(CPLD for

    GPIO addition)

    Peripheral HardwareInterfaces

    MMC/SDSocket -

    Courtesy: YMagic Inc,USA YMagic is the trademark of YMagic Inc,USA.

  • 8/2/2019 Da_Vinci Processors

    14/20

    VideoEncoder

    (D/A)

    10/100MBitEthernet

    AnalogVideo Out

    Analog

    ITU656

    EthernetPHY

    VideoEncoder

    CMOSCamera

    I/F

    Example:--PLUTO 3.0 New GenerationSingle Channel, Micro Networked Video Security Processing Platform

    Value: DaVinciValue: DaVinciValue: DaVinciValue: DaVinci ProcessorsProcessorsProcessorsProcessorswith Reduced BOM.with Reduced BOM.with Reduced BOM.with Reduced BOM.

    DigitalMedia

    Processor

    DM6446

    1/11/2010 SGGS I & ET,Nanded,INDIA 14

    USB

    Controller

    GLUE Logic(FPGA IDEcontroller)

    GLUE Logic(CPLDfor I/F)

    GLUE Logic(FPGA forMMC/SD

    Controller)

    GLUE Logic(CPLD for

    GPIO addition)

    Video In (A/D)

    HardDisk

    Peripheral HardwareInterfaces

    MMC/SDSocket

    Courtesy: YMagic Inc,USA YMagic is the trademark of YMagic Inc,USA.

  • 8/2/2019 Da_Vinci Processors

    15/20

    Exploiting Computational SpeedExploiting Computational SpeedExploiting Computational SpeedExploiting Computational Speedof DaVinciof DaVinciof DaVinciof DaVinci

    1/11/2010 SGGS I & ET,Nanded,INDIA 15

    xperimenta esu ts an na ysis romImplementation of Contourlet TransformImplementation of Contourlet TransformImplementation of Contourlet TransformImplementation of Contourlet Transformfor Image Fusion using DaVincifor Image Fusion using DaVincifor Image Fusion using DaVincifor Image Fusion using DaVinci Platform.Platform.Platform.Platform.By: Y.Wei,Y.Zhu,Feng.Z,,Y.Shi,Mo and et al.

  • 8/2/2019 Da_Vinci Processors

    16/20

    Contourlet Xform for Image FusionContourlet Xform for Image FusionContourlet Xform for Image FusionContourlet Xform for Image FusionIt is a multi-scale and

    multidirectional,twodimensional transform.It is a combination of

    1/11/2010 SGGS I & ET,Nanded,INDIA 16

    Laplacian pyramid anddirectional filter bank.Image Fusion:Image C =

    Inv C (C(Image A)+C(Image B))

  • 8/2/2019 Da_Vinci Processors

    17/20

    Experimental Results and Analysis:Experimental Results and Analysis:Experimental Results and Analysis:Experimental Results and Analysis:

    Program of contourlet-based imagefusion consumes 8 seconds only onDaVinci platform instead of 67

    1/11/2010 SGGS I & ET,Nanded,INDIA 17

    .Loop of Convolution operation 1000times requires 46 sec while it takes

    1698 sec on ARM.

  • 8/2/2019 Da_Vinci Processors

    18/20

    Impact!!Impact!!Impact!!Impact!!

    Decrease time-to-market turnover of newproducts.Enable OEM product differentiation with

    1/11/2010 SGGS I & ET,Nanded,INDIA 18

    , .Lower system costFast application development.

  • 8/2/2019 Da_Vinci Processors

    19/20

    References:References:References:References:www.focus.ti.com/docs/prod/folders/print/tms320dm6446.html/www.thedavincieffect.com/Y.Wei,Zhu & et al. Implementing Contourlet Transform onHeterogenous Platform. IEEE Eigth International Conference onEmbedded Computing.Deepu Talla and et al.Using DaVinci Technology for DV Devices. IEEE Computer Society Micro , vol. 24, no. 2, Oct/Nov. 2009, pp. 53-61.

    1/11/2010 SGGS I & ET,Nanded,INDIA 19

    IEEE Review I October 2005 www.ieee.org/review TIs Da Vinci targetsVideo Market.Page No:9X.Kong,H.Lin,J.Lin,S.Chen & et al. Implemetation of G.729 Codec onDaVinci Technology, IEEE 2008 International Conference onMultimedia and IT.http://www.ti.com/lit/pdf/sprue26

    Digital Signal Processors by B.Venkataramani, M.Bhasker. PublishedbyTata McGraw Hill Ltd,New Delhi.

  • 8/2/2019 Da_Vinci Processors

    20/20

    1/11/2010 SGGS I & ET,Nanded,INDIA 20