Embedded Processors ¾ AMBA BusAMBA Bus(cont.) High speed bus(ASB or AHB) for CPU Fast memory and...
Transcript of Embedded Processors ¾ AMBA BusAMBA Bus(cont.) High speed bus(ASB or AHB) for CPU Fast memory and...
Dalia Iurascu, Alejandro Vazquez Bofill
Embedded Processors
Advanced Digital IC Design
AMBA Bus
Dalia IurascuAlejandro Vázquez Bofill
Dalia Iurascu, Alejandro Vazquez Bofill
Lund University
Contents
Embedded ProcessorsOverview Design featuresDesign features
AMBA Bus System Why AMBAAMBA AHB, APB StructureAMBA Test Interface
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ConclusionsReferences
What is an Embedded Processor?
“Embedded” into a device, it delivers real-time behavior in power sensitive applications.
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Architecture as: Motorola 68000 (68K), Intel x86, AMD 29000(29K), Intel i960.
Shipment of Embedded Processors
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J. Hennessy, “The Future of Systems Research”
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Usage
Consumer electronics
Communication
Automotive
http
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Where are the embedded devices?
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Why is this important?
www.techweekeurope.co.uk/news/
Give products programmability and flexibility
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Eliminate components
Potential for future product upgrades(embedded software update)
Characteristics
Application Specific Processors
Static Structure
Non-homogeneous
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Number of embedded processor cores
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Power
Good Embedded Processors
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Good Embedded Processors
PerformanceLatencyLatencyBandwidth (throughput)
CostArea
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Complexity
μP/μC/DSP
μCsingle chipmemory , I/O portsmemory , I/O portsCISC processorsμPCPUmemory , I/O ports to be connected externallyRISC
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DSPspecialized microprocessordesigned for digital signal processingreal time
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DSP-advantages
VersatilityReprogrammed for other applications
RepeatabilityEasily duplicated
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Simplicity
Nios II Embedded Processor
Most used processor in the FPGA industry
Five-Stage pipelined general-purpose RISC microprocessor
Supports both 32-bit and 16-bit architectural
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variants
Both utilize a 16-bit instruction format to reduce code footprint and instruction memory bandwidth
Nios II
Configurable
l b d h l d dEasily combined with user logic and programmed into a PLDAdvanced features, such as custom instructions
Simultaneous multi-master Avalon bus
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Powerful processing solution
ARM-ISA
Load-Store RISC Architecture
32 bit Architecture32 bit Architecture
All instructions are predicated
16 RegistersR0-R14-general purpose register
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R15-program counter
32 bit instructions
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ARM Embedded Processors
Architectural simplicity
Small implementations
Very low power consumption
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Cortex M3
High performance 32-bit CPU
l h hDevelop high performance low-costplatforms
RISC processor core
Low latency 3
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Low latency 3-stage pipeline
Optimal blend of 16/32-bit instructions
AMBA-ARM designed
Advanced Microcontroller Bus ArchitectureOn-Chip communication standardSignal protocol-connect multiple blocks in SOC Signal protocol connect multiple blocks in SOC High-performance bus standardHigh speed cache interfaces
AMBAAHB(Advanced High Performance)
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ASB(Advanced System Bus)APB(Advanced Peripheral Bus)
Why AMBA?
Design for low power consumptionPartitioning high and low-bandwidth devicesLow costsLow costs
Test accessIntegrate optional on-chip test access methodology Reuses the basic bus infrastructure
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Support of multiple development platformsEasier to port real time kernel software
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ARM AMBA Bus
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www.citeseerx.ist.psu.edu/
AMBA Bus(cont.)
High speed bus(ASB or AHB) for CPUHigh speed bus(ASB or AHB) for CPU
Fast memory and DMA
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Bus for peripherals(APB)Connected via a bridge to the high-speed bus
AHB/APB
AHBHigh performance
APB
Low powerPipelined operation
Burst transfer
Multiple Bus Masters
p
Latched address and control
Simple Interface
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Split transactionsBus width 8,16,32,64,128 bits
Suitable for many peripherals
ASB
High performance
Pipelined operations
Multiple bus masters
Burst transfers
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Bus width: 8,16,32 bits
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AMBA AHB Structure
Initiate request to arbiter
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AMBA AHB Structure(cont.)
Used with central multiplexer interconnection scheme
Bus master drive out the address and control signalBus master drive out the address and control signal
ArbiterEnsures that only one bus master has access to the busEach bus master can request the bus, the arbiter d id hi h h th hi h t i it d i
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decides which has the highest priority and issues a grant signal accordingly
AMBA AHB Structure(cont.)
DecoderDecode the address of each transferSelect the signals from the slaveSelect the signals from the slave
Master:• Initiate read and write operations• Provide address and control information• Only one bus master use actively the bus at one time
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Slave:• Respond to a read/write operation
AMBA AHB Architecture
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http://www.ijest.info/docs/IJEST10-02-05-105.pdf
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APB Components
AHB to APB Bridge Latching of all address, data and control signals
Drive data for a write transfer
D i d t f
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Drive data for a read transfer
http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf
APB Slaves
Un-Pipelined
APB Components(cont.)
Un Pipelined
Zero power interface
Write data valid for the whole access
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http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf
ARM7 Processor
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http://www.cs.umich.edu/~prabal/teaching/eecs373-f10/readings/flynn97amba.pdf
AMBA Test Interface
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Provides access to inputs/outputs of peripheral that are not directly connected to the bus
Courtesy “AMBA 2.0”
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TIC(Test Interface Controller)
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Courtesy “AMBA 2.0”
Convert the external test vector into internal bus transfer
Inputs for Test Interface
TCLK
Test clock input signalMust not glitch
TREQA
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Test bus request ARequest entry into the test mode
Inputs(cont.)
TREQBTest bus request BType of test vector in the following cycleType of test vector in the following cycle
TACKGives external indication that test bus has been granted
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TBUS-bidirectionalApply address ,control write vectors
Conclusions
Embedded processors
Widely used and sold
Customized for a specific application
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Typically have fewer resources compared with General purpose processors
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Conclusions-AMBA
AMBA Bus
Bus-excellent communication medium to connect Bus excellent communication medium to connect several devices
Shared communication-bottleneck in the system
Technology independent
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Ensures that highly reusable peripheral can be migrated across a diverse range of IC processes
References
[1] S .Cotofana, St.Wong, St. Vassiliadis, “Embedded Processors: Characteristics and Trends”
[2] David Flynn ”AMBA :Enabling reusable On Chip Design”[2] David Flynn, AMBA :Enabling reusable On-Chip Design
[3] Jörg Henkel, Sri Parameswaran, Newton Cheung, ”Application-Specific Embedded Processors”
[4] http://embeddedsystemnews.com
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[5]http://www.eetimes.com/discussion/analystscorner/4025062/Comparing-embedded-processors
References
[7] http://www.ehow.com/facts_6878538_embedded-processor-definition.html
[8] www. citeseerx.ist.psu.edu
[9] http://www.esacademy.com/assets/faqs/primer/2.htm
[10] www.cs.ucr.edu/Yang lec5.ppt
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[11]http://blogs.mentor.com/verificationhorizons/blog/2011/03/31/part-2-the-2010-wilson-research-group-functional-verification-study
Thank you
Questions?
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