Embedded Processors ¾ AMBA Bus AMBA Bus(cont.) High speed bus(ASB or AHB) for CPU Fast memory...

Dalia Iurascu, Alejandro Vazquez Bofill
Embedded Processors
Advanced Digital IC Design
AMBA Bus
Dalia Iurascu Alejandro Vázquez Bofill
Lund University
Contents
Embedded Processors Overview Design featuresDesign features
AMBA Bus System Why AMBA AMBA AHB, APB Structure AMBA Test Interface
Conclusions References
What is an Embedded Processor?
“Embedded” into a device, it delivers real-time behavior in power sensitive applications.
Architecture as: Motorola 68000 (68K), Intel x86, AMD 29000(29K), Intel i960.
Shipment of Embedded Processors
J. Hennessy, “The Future of Systems Research”

Usage
Consumer electronics
Communication
Automotive
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Where are the embedded devices?
Why is this important?
www.techweekeurope.co.uk/news/
Give products programmability and flexibility
Eliminate components
Potential for future product upgrades(embedded software update)
Characteristics
Application Specific Processors
Static Structure
Non-homogeneous

Number of embedded processor cores
Power
Good Embedded Processors
Good Embedded Processors
Performance LatencyLatency Bandwidth (throughput)
Cost Area
Complexity
μP/μC/DSP
μC single chip memory , I/O portsmemory , I/O ports CISC processors μP CPU memory , I/O ports to be connected externally RISC
DSP specialized microprocessor designed for digital signal processing real time

DSP-advantages
Versatility Reprogrammed for other applications
Repeatability Easily duplicated
Simplicity
Nios II Embedded Processor
Most used processor in the FPGA industry
Five-Stage pipelined general-purpose RISC microprocessor
Supports both 32-bit and 16-bit architectural
variants
Both utilize a 16-bit instruction format to reduce code footprint and instruction memory bandwidth
Nios II
Configurable
l b d h l d dEasily combined with user logic and programmed into a PLD Advanced features, such as custom instructions
Simultaneous multi-master Avalon bus
Powerful processing solution
ARM-ISA
Load-Store RISC Architecture
32 bit Architecture32 bit Architecture
All instructions are predicated
16 Registers R0-R14-general purpose register
R15-program counter
32 bit instructions

ARM Embedded Processors
Architectural simplicity
Small implementations
Very low power consumption
Cortex M3
High performance 32-bit CPU
l h hDevelop high performance low-cost platforms
RISC processor core
Low latency 3
Low latency 3- stage pipeline
Optimal blend of 16/32-bit instructions
AMBA-ARM designed
Advanced Microcontroller Bus Architecture On-Chip communication standard Signal protocol-connect multiple blocks in SOC Signal protocol connect multiple blocks in SOC High-performance bus standard High speed cache interfaces
AMBA AHB(Advanced High Performance)
ASB(Advanced System Bus) APB(Advanced Peripheral Bus)
Why AMBA?
Design for low power consumption Partitioning high and low-bandwidth devices Low costsLow costs
Test access Integrate optional on-chip test access methodology Reuses the basic bus infrastructure
Support of multiple development platforms Easier to port real time kernel software

ARM AMBA Bus
www.citeseerx.ist.psu.edu/
AMBA Bus(cont.)
High speed bus(ASB or AHB) for CPUHigh speed bus(ASB or AHB) for CPU
Fast memory and DMA
Bus for peripherals(APB) Connected via a bridge to the high-speed bus
AHB/APB
AHB High performance
APB
Low power Pipelined operation
Burst transfer
Multiple Bus Masters
p
Latched address and control
Simple Interface
Split transactions Bus width 8,16,32,64,128 bits
Suitable for many peripherals
ASB
High performance
Pipelined operations
Multiple bus masters
Burst transfers
Bus width: 8,16,32 bits

AMBA AHB Structure
Initiate request to arbiter
Dalia Iurascu, Alejandro Vazquez Bofill http://www.ijest.info/docs/IJEST10-02-05-105.pdf
AMBA AHB Structure(cont.)
Used with central multiplexer interconnection scheme
Bus master drive out the address and control signalBus master drive out the address and control signal
Arbiter Ensures that only one bus master has access to the bus Each bus master can request the bus, the arbiter d id hi h h th hi h t i it d i
decides which has the highest priority and issues a grant signal accordingly
AMBA AHB Structure(cont.)
Decoder Decode the address of each transfer Select the signals from the slaveSelect the signals from the slave
Master: • Initiate read and write operations • Provide address and control information • Only one bus master use actively the bus at one time
Slave: • Respond to a read/write operation
AMBA AHB Architecture
http://www.ijest.info/docs/IJEST10-02-05-105.pdf

APB Components
AHB to APB Bridge Latching of all address, data and control signals
Drive data for a write transfer
D i d t f
Drive data for a read transfer
http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf
APB Slaves
Un-Pipelined
APB Components(cont.)
Un Pipelined
Zero power interface
Write data valid for the whole access
http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf
ARM7 Processor
http://www.cs.umich.edu/~prabal/teaching/eecs373-f10/readings/flynn97amba.pdf
AMBA Test Interface
Provides access to inputs/outputs of peripheral that are not directly connected to the bus
Courtesy “AMBA 2.0”

TIC(Test Interface Controller)
Courtesy “AMBA 2.0”
Convert the external test vector into internal bus transfer
Inputs for Test Interface
TCLK
Test clock input signal Must not glitch
TREQA
Test bus request A Request entry into the test mode
Inputs(cont.)
TREQB Test bus request B Type of test vector in the following cycleType of test vector in the following cycle
TACK Gives external indication that test bus has been granted
TBUS-bidirectional Apply address ,control write vectors
Conclusions
Embedded processors
Widely used and sold
Customized for a specific application
Typically have fewer resources compared with General purpose processors

Conclusions-AMBA
AMBA Bus
Bus-excellent communication medium to connect Bus excellent communication medium to connect several devices
Shared communication-bottleneck in the system
Technology independent
Ensures that highly reusable peripheral can be migrated across a diverse range of IC processes
References
[1] S .Cotofana, St.Wong, St. Vassiliadis, “Embedded Processors: Characteristics and Trends”
[2] David Flynn ”AMBA :Enabling reusable On Chip Design”[2] David Flynn, A

Embedded Processors ¾ AMBA Bus AMBA Bus(cont.) High speed bus(ASB or AHB) for CPU Fast memory...

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