2835 Sheet 6
1
2.5V 1:4 LVDS Buffer Decoupling FPGA 1 Input The University of Chicago 500MHz 16Ch ADC Module A 2835 FPGA - 1 6 10/16/2014 17 Drawn by: M. Bogdan M. Bogdan 3.0V 3.0V JTAG Connector Sheet 7 A USB-Blaster Engineer: DATE: REV. DRW. Sheet 10 8 4 US5 10 5 VCC2 14 VR 10 11 VT 9 _IN 1 15 PAD3 19 PAD4 20 Q0 15 16 Q0n 1 Q1 Q1n 2 3 Q2 Q2n 4 Q3 5 6 Q3n 7 VCC1 6 5 14 F_44 SY89832U 8 EN GND 13 IN 12 17 PAD1 18 PAD2 5 3 11 15 5 7 25 26 1 12 13 25 10 5 JT5 2 28 3 24 7 1 2 12 6 8 28 29 6 2 JT5 5 4 2 27 11 9 LED5 green 5 6 6 7 7 9 11 31 0 21 28 13 14 9 7 5 6 2 27 8 0 17 15 15 5 2 13 27 26 22 11 4 2 10K F_13 8 F_29 0.1uF 24 30 26 4 20 18 16 10 1 29 4 49 F_6 3 14 9 2 F_17 10K 17 19 0 26 4 4 0 23 15 16 3 0 1 7 29 240 F_12 11 4 1 1 10 23 21 19 9 16 15 1 7 4 F_31 0.1uF 3 F_48 10K 22 20 14 8 JT5 6 0 0 F_50 9 22 11 12 13 25 13 1 2 9 7 8 5 6 11 25 23 0 21 12 13 18 12 20 21 9 3 11 4 6 21 4 2 0 29 28 8 23 7 4 2 5 6 7 5 F_32 0.1uF 13 18 23 26 10 14 56pF cap0402 10 1 25 0 1 0 6 2 F_9 4 0 1 2 10 14 3 10 9 8 8 9 10 0 29 22 23 24 13 14 24 JT5 4 JT5 10 15 8 6 5 6 10 7 12 6 6 4 2 1 17 9 5 3 14 12 10 10 27 11 7 25 US5 VCC_W23 VCC_Y13 VCC_Y20 nCE_A33 nCONFIG_C33 nCSO_AM34 nSTATUS_B34 6 VCC_V14 VCC_V16 VCC_V18 VCC_V20 VCC_V22 VCC_V24 VCC_W13 VCC_W15 VCC_W17 VCC_W19 VCC_W21 VCC_U11 VCC_U12 VCC_U13 VCC_U15 VCC_U17 VCC_U19 VCC_U20 VCC_U21 VCC_U22 VCC_U23 VCC_V12 VCC_R19 VCC_R23 VCC_R25 VCC_T12 VCC_T14 VCC_T16 VCC_T18 VCC_T20 VCC_T22 VCC_T24 VCCT_GXBL1_T30 VCCT_GXBR0_W6 VCCT_GXBR0_Y5 VCCT_GXBR1_R6 VCCT_GXBR1_T5 VCC_AUX_P12 VCC_AUX_P24 VCC_AUX_W11 VCC_AUX_Y24 VCC_R14 VCC_R15 VCCR_GXBL_N30 VCCR_GXBL_U29 VCCR_GXBL_U30 VCCR_GXBR_AA5 VCCR_GXBR_AA6 VCCR_GXBR_N5 VCCR_GXBR_U5 VCCR_GXBR_U6 VCCT_GXBL0_W29 VCCT_GXBL0_Y30 VCCT_GXBL1_R29 VCCP_R21 VCCP_T10 VCCP_U25 VCCP_V10 VCCP_W25 VCCP_Y12 VCCP_Y19 VCCP_Y22 VCCR_GXBL_AA29 VCCR_GXBL_AA30 VCCPD7BCD_P14 VCCPD7BCD_P16 VCCPD7BCD_R11 VCCPD8_N26 VCCPD8_N27 VCCPD8_P20 VCCPD8_P22 VCCPGM_AC26 VCCPGM_M9 VCCP_P18 VCCP_R13 VCCPD3_AB26 VCCPD3_AC27 VCCPD3_Y21 VCCPD3_Y25 VCCPD4A_AB6 VCCPD4A_AB9 VCCPD4BCD_Y10 VCCPD4BCD_Y14 VCCPD4BCD_Y16 VCCPD7A_N8 VCCPD7A_N9 VCCIO8D_F18 VCCIO8D_J18 VCCL_GXBL0_V29 VCCL_GXBL0_V30 VCCL_GXBL1_P29 VCCL_GXBL1_P30 VCCL_GXBR0_V5 VCCL_GXBR0_V6 VCCL_GXBR1_P5 VCCL_GXBR1_P6 VCCIO8A_M26 VCCIO8B_A24 VCCIO8B_C24 VCCIO8B_F24 VCCIO8B_J24 VCCIO8C_A21 VCCIO8C_C21 VCCIO8C_F21 VCCIO8C_J21 VCCIO8D_A18 VCCIO8D_C18 VCCIO7C_F12 VCCIO7C_J12 VCCIO7D_A15 VCCIO7D_C15 VCCIO7D_F15 VCCIO7D_J15 VCCIO8A_C27 VCCIO8A_C30 VCCIO8A_F27 VCCIO8A_F30 VCCIO8A_J29 VCCIO7A_C5 VCCIO7A_F2 VCCIO7A_F5 VCCIO7A_L7 VCCIO7B_A9 VCCIO7B_C9 VCCIO7B_F9 VCCIO7B_J9 VCCIO7C_A12 VCCIO7C_C12 VCCIO4B_AJ9 VCCIO4B_AM9 VCCIO4B_AP9 VCCIO4C_AF12 VCCIO4C_AJ12 VCCIO4C_AM12 VCCIO4C_AP12 VCCIO4D_AF15 VCCIO4D_AJ15 VCCIO4D_AM15 VCCIO4D_AP15 VCCIO3C_AM21 VCCIO3C_AP21 VCCIO3D_AF18 VCCIO3D_AJ18 VCCIO3D_AM18 VCCIO3D_AP18 VCCIO4A_AD5 VCCIO4A_AF5 VCCIO4A_AH5 VCCIO4A_AK5 VCCIO4B_AF9 VCCIO3A_AH30 VCCIO3A_AJ27 VCCIO3A_AK30 VCCIO3A_AM27 VCCIO3B_AF24 VCCIO3B_AJ24 VCCIO3B_AM24 VCCIO3B_AP24 VCCIO3C_AF21 VCCIO3C_AJ21 VCCD_FPLL_P9 VCCD_FPLL_R16 VCCD_FPLL_Y17 VCCD_FPLL_Y26 VCCD_FPLL_Y9 VCCH_GXBL0_V28 VCCH_GXBL1_P28 VCCH_GXBR0_V7 VCCH_GXBR1_P7 VCCIO3A_AD30 VCCIO3A_AF27 VCCA_FPLL_T26 VCCA_FPLL_T9 VCCA_FPLL_V26 VCCA_FPLL_V9 VCCA_FPLL_Y18 VCCA_GXBL0_Y28 VCCA_GXBL1_T28 VCCA_GXBR0_Y7 VCCA_GXBR1_T7 VCCBAT_M28 VCCD_FPLL_P26 REFCLK3Lp_R26 REFCLK3Rn_R8 REFCLK3Rp_R9 RREF_BR_AM1 RREF_TL_F34 TCK_AN32 TDI_AC29 TDO_AC28 TMS_AF30 VCCA_FPLL_R17 REFCLK0Rn_AA7 REFCLK0Rp_AA8 REFCLK1Ln_W27 REFCLK1Lp_W26 REFCLK1Rn_W8 REFCLK1Rp_W9 REFCLK2Ln_U27 REFCLK2Lp_U26 REFCLK2Rn_U8 REFCLK2Rp_U9 REFCLK3Ln_R27 IO_P11 IO_Y11 IO_Y15 IO_Y23 MSEL0_D34 MSEL1_H30 MSEL2_K30 MSEL3_M29 MSEL4_M30 REFCLK0Ln_AA28 REFCLK0Lp_AA27 IO_N16 IO_N17 IO_N18 IO_N19 IO_N20 IO_N21 IO_N22 IO_N23 IO_N24 IO_N25 IO_M24 IO_M25 IO_M27 IO_M7 IO_M8 IO_N10 IO_N11 IO_N12 IO_N13 IO_N14 IO_N15 IO_M13 IO_M14 IO_M15 IO_M16 IO_M17 IO_M18 IO_M19 IO_M20 IO_M21 IO_M22 IO_M23 IO_L23 IO_L24 IO_L26 IO_L27 IO_L29 IO_L6 IO_L9 IO_M10 IO_M11 IO_M12 IO_K6 IO_K7 IO_K8 IO_K9 IO_L11 IO_L12 IO_L14 IO_L15 IO_L17 IO_L20 IO_L21 IO_K19 IO_K20 IO_K21 IO_K22 IO_K23 IO_K24 IO_K25 IO_K26 IO_K27 IO_K28 IO_K29 IO_J8 IO_K10 IO_K11 IO_K12 IO_K13 IO_K14 IO_K15 IO_K16 IO_K17 IO_K18 IO_J17 IO_J19 IO_J20 IO_J22 IO_J23 IO_J25 IO_J26 IO_J27 IO_J28 IO_J6 IO_J7 IO_H26 IO_H27 IO_H29 IO_H6 IO_H8 IO_H9 IO_J10 IO_J11 IO_J13 IO_J14 IO_J16 IO_H11 IO_H12 IO_H14 IO_H15 IO_H17 IO_H18 IO_H20 IO_H21 IO_H23 IO_H24 IO_G23 IO_G24 IO_G25 IO_G26 IO_G27 IO_G28 IO_G29 IO_G6 IO_G7 IO_G8 IO_G9 IO_G12 IO_G13 IO_G14 IO_G15 IO_G16 IO_G17 IO_G18 IO_G19 IO_G20 IO_G21 IO_G22 IO_F23 IO_F25 IO_F26 IO_F28 IO_F29 IO_F6 IO_F7 IO_F8 IO_G10 IO_G11 IO_E9 IO_F1 IO_F10 IO_F11 IO_F13 IO_F14 IO_F16 IO_F17 IO_F19 IO_F20 IO_F22 IO_E24 IO_E26 IO_E27 IO_E29 IO_E3 IO_E30 IO_E32 IO_E4 IO_E5 IO_E6 IO_E8 IO_E11 IO_E12 IO_E14 IO_E15 IO_E17 IO_E18 IO_E2 IO_E20 IO_E21 IO_E23 IO_D3 IO_D30 IO_D31 IO_D32 IO_D33 IO_D5 IO_D6 IO_D7 IO_D8 IO_D9 IO_E1 IO_D19 IO_D20 IO_D21 IO_D22 IO_D23 IO_D24 IO_D25 IO_D26 IO_D27 IO_D28 IO_D29 IO_D1 IO_D10 IO_D11 IO_D12 IO_D13 IO_D14 IO_D15 IO_D16 IO_D17 IO_D18 IO_C25 IO_C26 IO_C28 IO_C29 IO_C3 IO_C31 IO_C32 IO_C4 IO_C6 IO_C7 IO_C8 IO_C10 IO_C11 IO_C13 IO_C14 IO_C16 IO_C17 IO_C19 IO_C2 IO_C20 IO_C22 IO_C23 IO_B27 IO_B29 IO_B3 IO_B30 IO_B32 IO_B5 IO_B6 IO_B8 IO_B9 IO_C1 IO_B12 IO_B14 IO_B15 IO_B17 IO_B18 IO_B2 IO_B20 IO_B21 IO_B23 IO_B24 IO_B26 IO_AP29 IO_AP3 IO_AP30 IO_AP31 IO_AP32 IO_AP4 IO_AP5 IO_AP6 IO_AP7 IO_AP8 IO_B11 IO_AP17 IO_AP19 IO_AP2 IO_AP20 IO_AP22 IO_AP23 IO_AP25 IO_AP26 IO_AP27 IO_AP28 IO_AN3 IO_AN30 IO_AN5 IO_AN6 IO_AN8 IO_AN9 IO_AP10 IO_AP11 IO_AP13 IO_AP14 IO_AP16 IO_AN14 IO_AN15 IO_AN17 IO_AN18 IO_AN20 IO_AN21 IO_AN23 IO_AN24 IO_AN26 IO_AN27 IO_AN29 IO_AM3 IO_AM30 IO_AM31 IO_AM4 IO_AM5 IO_AM6 IO_AM7 IO_AM8 IO_AN11 IO_AN12 IO_AM14 IO_AM16 IO_AM17 IO_AM19 IO_AM20 IO_AM22 IO_AM23 IO_AM25 IO_AM26 IO_AM28 IO_AM29 IO_AL30 IO_AL31 IO_AL4 IO_AL5 IO_AL6 IO_AL7 IO_AL8 IO_AL9 IO_AM10 IO_AM11 IO_AM13 IO_AL20 IO_AL21 IO_AL22 IO_AL23 IO_AL24 IO_AL25 IO_AL26 IO_AL27 IO_AL28 IO_AL29 IO_AK9 IO_AL10 IO_AL11 IO_AL12 IO_AL13 IO_AL14 IO_AL15 IO_AL16 IO_AL17 IO_AL18 IO_AL19 IO_AK17 IO_AK18 IO_AK20 IO_AK21 IO_AK23 IO_AK24 IO_AK26 IO_AK27 IO_AK29 IO_AK6 IO_AK8 IO_AJ26 IO_AJ28 IO_AJ29 IO_AJ6 IO_AJ7 IO_AJ8 IO_AK11 IO_AK12 IO_AK14 IO_AK15 IO_AJ10 IO_AJ11 IO_AJ13 IO_AJ14 IO_AJ16 IO_AJ17 IO_AJ19 IO_AJ20 IO_AJ22 IO_AJ23 IO_AJ25 IO_AH23 IO_AH24 IO_AH25 IO_AH26 IO_AH27 IO_AH28 IO_AH29 IO_AH6 IO_AH7 IO_AH8 IO_AH9 IO_AH13 IO_AH14 IO_AH15 IO_AH16 IO_AH17 IO_AH18 IO_AH19 IO_AH20 IO_AH21 IO_AH22 IO_AG23 IO_AG24 IO_AG26 IO_AG27 IO_AG29 IO_AG6 IO_AG8 IO_AG9 IO_AH10 IO_AH11 IO_AH12 IO_AF6 IO_AF7 IO_AF8 IO_AG11 IO_AG12 IO_AG14 IO_AG15 IO_AG17 IO_AG18 IO_AG20 IO_AG21 IO_AF16 IO_AF17 IO_AF19 IO_AF20 IO_AF22 IO_AF23 IO_AF25 IO_AF26 IO_AF28 IO_AF29 IO_AE27 IO_AE28 IO_AE29 IO_AE6 IO_AE7 IO_AE8 IO_AE9 IO_AF10 IO_AF11 IO_AF13 IO_AF14 IO_AE16 IO_AE17 IO_AE18 IO_AE19 IO_AE20 IO_AE21 IO_AE22 IO_AE23 IO_AE24 IO_AE25 IO_AE26 IO_AD29 IO_AD6 IO_AD8 IO_AD9 IO_AE10 IO_AE11 IO_AE12 IO_AE13 IO_AE14 IO_AE15 IO_AD11 IO_AD12 IO_AD14 IO_AD15 IO_AD17 IO_AD20 IO_AD21 IO_AD23 IO_AD24 IO_AD26 IO_AD27 IO_AC19 IO_AC20 IO_AC21 IO_AC22 IO_AC23 IO_AC24 IO_AC25 IO_AC6 IO_AC7 IO_AC8 IO_AC9 IO_AB25 IO_AC10 IO_AC11 IO_AC12 IO_AC13 IO_AC14 IO_AC15 IO_AC16 IO_AC17 IO_AC18 IO_AB14 IO_AB15 IO_AB16 IO_AB17 IO_AB18 IO_AB19 IO_AB20 IO_AB21 IO_AB22 IO_AB23 IO_AB24 IO_AA15 IO_AA17 IO_AA18 IO_AA20 IO_AA21 IO_AA23 IO_AA25 IO_AB10 IO_AB11 IO_AB12 IO_AB13 IO_A31 IO_A32 IO_A4 IO_A5 IO_A6 IO_A7 IO_A8 IO_AA10 IO_AA12 IO_AA14 IO_A2 IO_A20 IO_A22 IO_A23 IO_A25 IO_A26 IO_A27 IO_A28 IO_A29 IO_A3 IO_A30 GXT_R8n_N4 GXT_R8p_N3 GXT_R9n_L4 GXT_R9p_L3 IO_A10 IO_A11 IO_A13 IO_A14 IO_A16 IO_A17 IO_A19 GXT_R3n_AC4 GXT_R3p_AC3 GXT_R4n_AA4 GXT_R4p_AA3 GXT_R5n_W4 GXT_R5p_W3 GXT_R6n_U4 GXT_R6p_U3 GXT_R7n_R4 GXT_R7p_R3 GXT_L9p_L32 GXT_R0n_AJ4 GXT_R0p_AJ3 GXT_R10n_J4 GXT_R10p_J3 GXT_R11n_G4 GXT_R11p_G3 GXT_R1n_AG4 GXT_R1p_AG3 GXT_R2n_AE4 GXT_R2p_AE3 GXT_L4n_AA31 GXT_L4p_AA32 GXT_L5n_W31 GXT_L5p_W32 GXT_L6n_U31 GXT_L6p_U32 GXT_L7n_R31 GXT_L7p_R32 GXT_L8n_N31 GXT_L8p_N32 GXT_L9n_L31 GXT_L10n_J31 GXT_L10p_J32 GXT_L11n_G31 GXT_L11p_G32 GXT_L1n_AG31 GXT_L1p_AG32 GXT_L2n_AE31 GXT_L2p_AE32 GXT_L3n_AC31 GXT_L3p_AC32 GXCK_R5p_Y1 GXCK_R6n_V2 GXCK_R6p_V1 GXCK_R7n_T2 GXCK_R7p_T1 GXCK_R8n_P2 GXCK_R8p_P1 GXCK_R9n_M2 GXCK_R9p_M1 GXT_L0n_AJ31 GXT_L0p_AJ32 GXCK_R11n_H2 GXCK_R11p_H1 GXCK_R1n_AH2 GXCK_R1p_AH1 GXCK_R2n_AF2 GXCK_R2p_AF1 GXCK_R3n_AD2 GXCK_R3p_AD1 GXCK_R4n_AB2 GXCK_R4p_AB1 GXCK_R5n_Y2 GXCK_L7n_T33 GXCK_L7p_T34 GXCK_L8n_P33 GXCK_L8p_P34 GXCK_L9n_M33 GXCK_L9p_M34 GXCK_R0n_AK2 GXCK_R0p_AK1 GXCK_R10n_K2 GXCK_R10p_K1 GXCK_L1p_AH34 GXCK_L2n_AF33 GXCK_L2p_AF34 GXCK_L3n_AD33 GXCK_L3p_AD34 GXCK_L4n_AB33 GXCK_L4p_AB34 GXCK_L5n_Y33 GXCK_L5p_Y34 GXCK_L6n_V33 GXCK_L6p_V34 GND_Y32 GND_Y4 GND_Y6 GND_Y8 GXCK_L0n_AK33 GXCK_L0p_AK34 GXCK_L10n_K33 GXCK_L10p_K34 GXCK_L11n_H33 GXCK_L11p_H34 GXCK_L1n_AH33 GND_W28 GND_W30 GND_W33 GND_W34 GND_W5 GND_W7 GND_Y27 GND_Y29 GND_Y3 GND_Y31 GND_V8 GND_W1 GND_W10 GND_W12 GND_W14 GND_W16 GND_W18 GND_W2 GND_W20 GND_W22 GND_W24 GND_V15 GND_V17 GND_V19 GND_V21 GND_V23 GND_V25 GND_V27 GND_V3 GND_V31 GND_V32 GND_V4 GND_U16 GND_U18 GND_U2 GND_U24 GND_U28 GND_U33 GND_U34 GND_U7 GND_V11 GND_V13 GND_T27 GND_T29 GND_T3 GND_T31 GND_T32 GND_T4 GND_T6 GND_T8 GND_U1 GND_U10 GND_U14 GND_R34 GND_R5 GND_R7 GND_T11 GND_T13 GND_T15 GND_T17 GND_T19 GND_T21 GND_T23 GND_T25 GND_R10 GND_R12 GND_R18 GND_R2 GND_R20 GND_R22 GND_R24 GND_R28 GND_R30 GND_R33 GND_P19 GND_P21 GND_P23 GND_P25 GND_P27 GND_P3 GND_P31 GND_P32 GND_P4 GND_P8 GND_R1 GND_N2 GND_N28 GND_N29 GND_N33 GND_N34 GND_N6 GND_N7 GND_P10 GND_P13 GND_P15 GND_P17 GND_L34 GND_L5 GND_L8 GND_M3 GND_M31 GND_M32 GND_M4 GND_M5 GND_M6 GND_N1 GND_L1 GND_L10 GND_L13 GND_L16 GND_L19 GND_L2 GND_L22 GND_L25 GND_L28 GND_L30 GND_L33 GND_H7 GND_J1 GND_J2 GND_J30 GND_J33 GND_J34 GND_J5 GND_K3 GND_K31 GND_K32 GND_K4 GND_H16 GND_H19 GND_H22 GND_H25 GND_H28 GND_H3 GND_H31 GND_H32 GND_H4 GND_H5 GND_F31 GND_F32 GND_F4 GND_G1 GND_G2 GND_G30 GND_G33 GND_G34 GND_G5 GND_H10 GND_H13 GND_E10 GND_E13 GND_E16 GND_E19 GND_E22 GND_E25 GND_E28 GND_E31 GND_E34 GND_E7 GND_F3 GND_B19 GND_B22 GND_B25 GND_B28 GND_B31 GND_B33 GND_B4 GND_B7 GND_D2 GND_D4 GND_AN19 GND_AN22 GND_AN25 GND_AN28 GND_AN31 GND_AN4 GND_AN7 GND_B1 GND_B10 GND_B13 GND_B16 GND_AK4 GND_AK7 GND_AL1 GND_AL2 GND_AL3 GND_AL33 GND_AL34 GND_AN1 GND_AN10 GND_AN13 GND_AN16 GND_AK10 GND_AK13 GND_AK16 GND_AK19 GND_AK22 GND_AK25 GND_AK28 GND_AK3 GND_AK31 GND_AK32 GND_AG7 GND_AH3 GND_AH31 GND_AH32 GND_AH4 GND_AJ1 GND_AJ2 GND_AJ30 GND_AJ33 GND_AJ34 GND_AJ5 GND_AG13 GND_AG16 GND_AG19 GND_AG2 GND_AG22 GND_AG25 GND_AG28 GND_AG30 GND_AG33 GND_AG34 GND_AG5 GND_AE30 GND_AE33 GND_AE34 GND_AE5 GND_AF3 GND_AF31 GND_AF32 GND_AF4 GND_AG1 GND_AG10 GND_AD19 GND_AD22 GND_AD25 GND_AD28 GND_AD3 GND_AD31 GND_AD32 GND_AD4 GND_AD7 GND_AE1 GND_AE2 GND_AB7 GND_AB8 GND_AC1 GND_AC2 GND_AC30 GND_AC33 GND_AC34 GND_AC5 GND_AD10 GND_AD13 GND_AD16 GND_AA9 GND_AB27 GND_AB28 GND_AB29 GND_AB3 GND_AB30 GND_AB31 GND_AB32 GND_AB4 GND_AB5 GND_AA1 GND_AA11 GND_AA13 GND_AA16 GND_AA19 GND_AA2 GND_AA22 GND_AA24 GND_AA26 GND_AA33 GND_AA34 AS_DATA3_AM33 CONF_DONE_C34 DCLK_AM32 DNU_AD18 DNU_AL32 DNU_AM2 DNU_AN2 DNU_E33 DNU_F33 DNU_K5 DNU_L18 9 VCCorDATA3 1 7 nCS 18 5AGXFB5_HS40x60mm FPGA_1 AS_DATA0_AN34 AS_DATA1_AN33 AS_DATA2_AP33 16 10 GND NC1 3 4 NC2 5 NC3 NC4 6 NC5 11 12 NC6 13 NC7 NC8 14 2 VCC VCCorDATA2 17 18 1 2 EPCQ256 U612 15 ASDIorDATA0 DATA1 8 DCLK 5 3 5 0 0 F_33 25 US5 6 14 US5 7 US5 0 2 3 7 6 7 8 19 11 12 11 2 13 6 11 8 9 15 16 10 4 19 9 7 5 16 12 13 8 15 7 8 10 13 20 18 0 US5 1 9 20 13 F_41 3 4 22 F_10 1K 2 22 14 12 19 cap0402 56pF 1 7 5 3 4 4 11 0 1 15 18 16 6 4 5 1 12 13 F_21 22 F_38 49 10 0 12 25 15 5 23 21 F_34 0 10K F_40 1 13 14 F_16 0 13 7 24 30 31 12 JT5 9 28 6 2 3 6 19 JT5 23 11 LED5 red 1 2 20 5 7 0 JT5 8 2 28 14 19 17 15 6 9 2 19 17 1 15 5 1 3 6 4 1 F_30 0.1uF 15 20 0 18 2 25 F_46 2K JT5 3 15 16 8 4 5 8 1 4 3 13 17 F_45 10K 17 1 13 20 18 1 14 0 240 F_8 0 8 24 3 10 12 4 2 11 9 4 27 11 0 5 9 10 12 11 yellow LED5 3 4 17 2 F_39 0 29 1 25 18 16 F_49 space 0 15 26 22 0 10 7 5 2 25 3 27 23 7 26 12 7 12 5 3 16 +3.3V 6 26 22 20 0 F_28 4 23 21 13 27 13 4 16 14 1 3 28 5 3 1 1 21 10 6 5 3 24 22 20 18 20 3 20 18 F_47 240 5 21 19 US5 8 15 24 9 10 19 240 F_101 15 2K F_43 0 14 10K F_42 JT5 1 1 3 11 0 1 3 3 22 F_18 21 19 12 4 24 19 17 15 US5 space F_37 F_7 240 US5 8 8 0 9 CTRL1 tp2 1 2 29 F_27 0 1 27 3 24 10K F_20 26 26 11 1 0 0 F_36 14 0 1 2 28 3 21 16 12 3 29 28 24 14 4 26 11 5 13 27 7 8 7 5 F_14 22 0 29 2 25 H_GXB_1.5V LR_GXB_1.15V T_GXB_1.15V VAUX_2.5V VCCP_1.1V VCC_1.1V VIO_2.5V VIO_3.0V 9 2 9 28 17 2 0 29 US5 0 0 14 12 22 3 F_35 0 16 14 10 8 15 11 27 22 F_11 29 28 2 14 0 22 23 21 9 4 6 1 diff-01_9 ADC0in_8 90, 80 diff-01_8 ADC0in_7 90, 80 diff-01_7 ADC0in_6 90, 80 90, 80 diff-01_6 ADC0in_5 diff-01_5 ADC0in_4 90, 80 diff-01_4 ADC0in_3 90, 80 diff-01_3 ADC0in_2 90, 80 diff-01_2 ADC0in_1 90, 80 90, 80 diff-01_1 ADC0in_0 27 diff-01_6 90, 80 diff-01_5 90, 80 ADC0in_4n ADC0in_3n diff-01_4 90, 80 ADC0in_2n diff-01_3 90, 80 ADC0in_1n diff-01_2 90, 80 90, 80 ADC0in_0n diff-01_1 diff-01_14 ADCclk0 90, 80 diff-01_13 ADC0in_12 90, 80 diff-01_12 ADC0in_11 90, 80 diff-01_11 ADC0in_10 90, 80 90, 80 diff-01_10 ADC0in_9 80, 71 ADC1in_1 diff-02_2 80, 71 ADC1in_0 diff-02_1 80, 71 ADCclk0n diff-01_14 90, 80 ADC0in_12n diff-01_13 90, 80 ADC0in_11n diff-01_12 90, 80 ADC0in_10n diff-01_11 90, 80 90, 80 ADC0in_9n diff-01_10 diff-01_9 ADC0in_8n 90, 80 ADC0in_7n diff-01_8 90, 80 ADC0in_6n diff-01_7 90, 80 ADC0in_5n ADC1in_12 diff-02_13 80, 71 ADC1in_11 diff-02_12 80, 71 ADC1in_10 diff-02_11 80, 71 ADC1in_9 diff-02_10 80, 71 ADC1in_8 diff-02_9 80, 71 ADC1in_7 diff-02_8 80, 71 ADC1in_6 diff-02_7 80, 71 ADC1in_5 diff-02_6 80, 71 ADC1in_4 diff-02_5 80, 71 ADC1in_3 diff-02_4 80, 71 ADC1in_2 diff-02_3 ADC1in_9n 80, 71 ADC1in_8n diff-02_9 80, 71 diff-02_8 ADC1in_7n 80, 71 diff-02_7 ADC1in_6n 80, 71 diff-02_6 ADC1in_5n 80, 71 diff-02_5 ADC1in_4n 80, 71 ADC1in_3n diff-02_4 80, 71 diff-02_3 ADC1in_2n 80, 71 diff-02_2 ADC1in_1n 80, 71 diff-02_1 ADC1in_0n 80, 71 ADCclk1 diff-02_14 80, 71 60, 51 ADC2in_5 diff-11_6 60, 51 ADC2in_4 diff-11_5 60, 51 ADC2in_3 diff-11_4 60, 51 ADC2in_2 diff-11_3 60, 51 ADC2in_1 diff-11_2 60, 51 ADC2in_0 diff-11_1 60, 51 diff-02_14 ADCclk1n 80, 71 diff-02_13 ADC1in_12n 80, 71 diff-02_12 ADC1in_11n 80, 71 diff-02_11 ADC1in_10n 80, 71 diff-02_10 diff-11_3 ADC2in_2n 60, 51 diff-11_2 ADC2in_1n 60, 51 diff-11_1 ADC2in_0n 60, 51 ADCclk2 diff-11_14 60, 51 ADC2in_12 diff-11_13 60, 51 ADC2in_11 diff-11_12 60, 51 ADC2in_10 diff-11_11 60, 51 ADC2in_9 diff-11_10 60, 51 ADC2in_8 diff-11_9 60, 51 ADC2in_7 diff-11_8 60, 51 ADC2in_6 diff-11_7 ADCclk2n 60, 51 diff-11_13 ADC2in_12n 60, 51 diff-11_12 ADC2in_11n 60, 51 diff-11_11 ADC2in_10n 60, 51 diff-11_10 ADC2in_9n 60, 51 ADC2in_8n diff-11_9 60, 51 diff-11_8 ADC2in_7n 60, 51 diff-11_7 ADC2in_6n 60, 51 diff-11_6 ADC2in_5n 60, 51 diff-11_5 ADC2in_4n 60, 51 ADC2in_3n diff-11_4 60, 51 60, 51 diff-12_10 ADC3in_9 60, 51 diff-12_9 ADC3in_8 60, 51 diff-12_8 ADC3in_7 60, 51 diff-12_7 ADC3in_6 60, 51 diff-12_6 ADC3in_5 60, 51 diff-12_5 ADC3in_4 60, 51 diff-12_4 ADC3in_3 60, 51 diff-12_3 ADC3in_2 60, 51 diff-12_2 ADC3in_1 60, 51 diff-12_1 ADC3in_0 60, 51 diff-11_14 ADC3in_6n diff-12_7 60, 51 ADC3in_5n diff-12_6 60, 51 ADC3in_4n diff-12_5 60, 51 diff-12_4 ADC3in_3n 60, 51 ADC3in_2n diff-12_3 60, 51 ADC3in_1n diff-12_2 60, 51 ADC3in_0n diff-12_1 60, 51 diff-12_14 ADCclk3 60, 51 diff-12_13 ADC3in_12 60, 51 diff-12_12 ADC3in_11 60, 51 diff-12_11 ADC3in_10 ADC4in_10n 60, 51 diff-21_12 ADC4in_11n 60, 51 diff-21_14 ADCclk4n 60, 51 diff-21_13 ADC4in_12n 60, 51 ADCclk3n diff-12_14 60, 51 ADC3in_12n diff-12_13 60, 51 ADC3in_11n diff-12_12 60, 51 ADC3in_10n diff-12_11 60, 51 ADC3in_9n diff-12_10 60, 51 diff-12_9 ADC3in_8n 60, 51 ADC3in_7n diff-12_8 60, 51 60, 51 ADC4in_12 diff-21_13 60, 51 diff-21_2 ADC4in_1n 60, 51 diff-21_3 ADC4in_2n 60, 51 ADC4in_3n diff-21_4 60, 51 diff-21_5 ADC4in_4n 60, 51 diff-21_6 ADC4in_5n 60, 51 diff-21_7 ADC4in_6n 60, 51 diff-21_8 ADC4in_7n 60, 51 ADC4in_8n diff-21_9 60, 51 diff-21_10 ADC4in_9n 60, 51 diff-21_11 ADC4in_2 diff-21_3 60, 51 ADC4in_3 diff-21_4 60, 51 ADC4in_4 diff-21_5 60, 51 ADC4in_5 diff-21_6 60, 51 ADC4in_6 diff-21_7 60, 51 ADC4in_7 diff-21_8 60, 51 ADC4in_8 diff-21_9 60, 51 ADC4in_9 diff-21_10 60, 51 ADC4in_10 diff-21_11 60, 51 ADC4in_11 diff-21_12 60, 51 ADCclk4 diff-21_14 ADC5in_6 70, 61 diff-22_8 ADC5in_7 70, 61 diff-22_9 ADC5in_8 70, 61 diff-22_10 ADC5in_9 70, 61 diff-22_11 ADC5in_10 70, 61 diff-22_12 ADC5in_11 70, 61 diff-22_14 ADCclk5 70, 61 diff-22_13 ADC5in_12 70, 61 ADC4in_0 diff-21_1 60, 51 diff-21_1 ADC4in_0n 60, 51 ADC4in_1 diff-21_2 60, 51 80, 71 ADC6in_10n diff-31_11 80, 71 ADC6in_11n diff-31_12 80, 71 ADCclk6n diff-31_14 80, 71 ADC6in_12n diff-31_13 80, 71 diff-22_1 ADC5in_0 70, 61 diff-22_2 ADC5in_1 70, 61 diff-22_3 ADC5in_2 70, 61 diff-22_4 ADC5in_3 70, 61 diff-22_5 ADC5in_4 70, 61 diff-22_6 ADC5in_5 70, 61 diff-22_7 diff-31_14 ADCclk6 80, 71 diff-31_13 ADC6in_12 80, 71 ADC6in_1n diff-31_2 80, 71 ADC6in_2n diff-31_3 80, 71 diff-31_4 ADC6in_3n 80, 71 ADC6in_4n diff-31_5 80, 71 ADC6in_5n diff-31_6 80, 71 ADC6in_6n diff-31_7 80, 71 ADC6in_7n diff-31_8 80, 71 diff-31_9 ADC6in_8n 80, 71 ADC6in_9n diff-31_10 ADC6in_1 80, 71 diff-31_3 ADC6in_2 80, 71 diff-31_4 ADC6in_3 80, 71 diff-31_5 ADC6in_4 80, 71 diff-31_6 ADC6in_5 80, 71 diff-31_7 ADC6in_6 80, 71 diff-31_8 ADC6in_7 80, 71 diff-31_9 ADC6in_8 80, 71 diff-31_10 ADC6in_9 80, 71 diff-31_11 ADC6in_10 80, 71 diff-31_12 ADC6in_11 80, 71 90, 81 diff-32_7 ADC7in_6n 90, 81 diff-32_8 ADC7in_7n 90, 81 ADC7in_8n diff-32_9 90, 81 diff-32_10 ADC7in_9n 90, 81 diff-32_11 ADC7in_10n 90, 81 diff-32_12 ADC7in_11n 90, 81 diff-32_14 ADCclk7n 90, 81 diff-32_13 ADC7in_12n 90, 81 diff-31_1 ADC6in_0 80, 71 ADC6in_0n diff-31_1 80, 71 diff-31_2 ADC7in_8 diff-32_9 90, 81 ADC7in_9 diff-32_10 90, 81 ADC7in_10 diff-32_11 90, 81 ADC7in_11 diff-32_12 90, 81 ADCclk7 diff-32_14 90, 81 ADC7in_12 diff-32_13 90, 81 diff-32_2 ADC7in_1n 90, 81 diff-32_3 ADC7in_2n 90, 81 ADC7in_3n diff-32_4 90, 81 diff-32_5 ADC7in_4n 90, 81 diff-32_6 ADC7in_5n GND GND* ADC7in_0 diff-32_1 90, 81 diff-32_1 ADC7in_0n 90, 81 ADC7in_1 diff-32_2 90, 81 ADC7in_2 diff-32_3 90, 81 ADC7in_3 diff-32_4 90, 81 ADC7in_4 diff-32_5 90, 81 ADC7in_5 diff-32_6 90, 81 ADC7in_6 diff-32_7 90, 81 ADC7in_7 diff-32_8 90, 81 GND GND GND VCCT_GXBR0 GND VCCA_GXBR0 GND VCCD_FPLL VCCPD4BCD 2_RXD_14 VCCP VCC VCCPD4BCD ADC5in_8n VCCPD4BCD VCCD_FPLL VCCA_FPLL VCCP VCC VCCPD3 VCCP addr_18 VCC_AUX VCCPD3 VCCD_FPLL GND VCCA_GXBL0 GND VCCT_GXBL0 GND GND GND GND GND GND GND VCCT_GXBR0 GND GND GND GND VCC_AUX GND VCC GND VCC GND VCC GND VCC GND VCC GND VCC GND VCCP GND GND GND VCCT_GXBL0 GND GND GND GND GND GND GND VCCL_GXBR0 VCCL_GXBR0 VCCH_GXBR0 GND VCCA_FPLL VCCP GND VCC GND VCC GND VCC GND VCC GND VCC GND VCC GND VCC GND VCCA_FPLL GND VCCH_GXBL0 VCCL_GXBL0 VCCL_GXBL0 GND GND GND GND GND GND VCCR_GXBR VCCR_GXBR GND GND GND GND VCC VCC VCC GND VCC GND VCC GND VCC VCC VCC VCC VCC GND VCCP GND GND GND VCCR_GXBL VCCR_GXBL GND GND GND GND GND GND VCCT_GXBR1 GND VCCA_GXBR1 GND VCCA_FPLL VCCP GND VCC GND VCC GND VCC GND VCC GND VCC GND VCC GND VCC GND VCCA_FPLL GND VCCA_GXBL1 GND VCCT_GXBL1 GND GND GND GND GND GND GND VCCT_GXBR1 GND GND GND GND VCCPD7BCD GND VCCP VCC VCC VCCD_FPLL VCCA_FPLL GND VCC GND VCCP GND VCC GND VCC GND GND GND VCCT_GXBL1 GND GND GND GND GND GND GND VCCL_GXBR1 VCCL_GXBR1 VCCH_GXBR1 GND VCCD_FPLL GND vme_data_11 VCC_AUX GND VCCPD7BCD GND VCCPD7BCD GND VCCP GND VCCPD8 GND VCCPD8 GND VCC_AUX GND VCCD_FPLL GND VCCH_GXBL1 VCCL_GXBL1 VCCL_GXBL1 GND GND GND GND GND GND VCCR_GXBR GND GND VCCPD7A VCCPD7A ADC2in_7 ADC2in_7n 3_TXD_3 3_TXD_4 addr_21 3_TXD_5 CRC_ERROR_IN address_26 vme_data_4 address_27 addr_13 address_28 address_29 address_30 addr_23 address_31 VCCPD8 VCCPD8 GND GND VCCR_GXBL GND GND GND GND GND addr_24 3_TXD_0 VCCPGM 3_TXD_6 3_TXD_7 samplingclockn vme_data_28 3_TXD_8 3_TXD_10 addr_2 addr_3 addr_4 addr_7 addr_5 vmewrite vmeds vmeas address_21 address_20 VCCIO8A GND* VCCBAT MSEL3 MSEL4 GND GND GND GND 3_TXD_2 VCCIO7A GND 3_TXD_1 GND 3_TXD_9 samplingclock GND 3_TXD_14 addr_6 GND addr_8 GND ADC1in_10n addr_12 GND addr_15 _lword GND address_19 address_18 GND address_9 GND GND GND GND GND GND GND ADC_SDO_3 ADC_SRESET_3 ADC2in_4n ADC2in_4 3_TXD_11 3_TXD_12 3_TXD_13 3_TXD_15 addr_9 addr_22 addr_10 vme_data_7 ADCclk2 ADCclk2n ADC1in_10 addr_14 vme_data_22 addr_17 _iack transceivers_OE address_22 address_17 address_11 address_8 MSEL2 GND GND GND GND GND GND ADC_SDO_2 ADC_SRESET_2 ADC2in_11n VCCIO7B led_1 led_2 VCCIO7C vme_data_15 ADC2in_12n VCCIO7D vme_data_31 ADC1in_8n VCCIO8D ADC1in_0n vme_data_5 VCCIO8C vme_data_12 ADC0in_10n VCCIO8B _vme_write address_23 address_16 address_10 VCCIO8A GND GND GND GND GND GND GND GND ADC2in_11 vme_data_19 GND ADC3in_11n ADC3in_0n GND ADC2in_12 ADC2in_10n GND ADC1in_8 ADC1in_0 GND vme_data_25 vme_data_24 GND ADC0in_10 ADC0in_9n GND address_24 address_15 GND ADCclk0n MSEL1 GND GND GND GND GND GND GND ADC_SRESET_1 vme_data_10 vme_data_27 ADC3in_2n ADC3in_11 ADC3in_0 ADC3in_4n ADC2in_3n ADC2in_10 ADC2in_9n ADC1in_2n 2_XCLK vme_data_17 ADC0in_5n vme_data_29 ADC1in_6n ADC0in_6n ADC0in_9 ADC0in_4n address_25 address_14 address_13 ADCclk0 GND GND GND GND GND GND GND GND ADC_SDO_1 ADC_SDIO_3 ADC_SRESET_0 vme_data_14 VCCIO7B ADC3in_2 ADC3in_12n VCCIO7C ADC3in_4 ADC2in_3 VCCIO7D ADC2in_9 ADC1in_2 VCCIO8D vme_data_18 ADC0in_5 VCCIO8C ADC1in_6 ADC0in_6 VCCIO8B ADC0in_4 am_2 VCCIO8A address_12 address_7 VCCIO8A GND GND RREF_F34 GND GND GND ADC_SDO_0 GND led_0 vme_data_20 GND ADC3in_12 vme_data_26 GND ADC2in_1n vme_data_3 GND vme_data_6 vme_data_16 GND ADC0in_11n ADC1in_3n GND am_5 ADC0in_3n GND am_1 ADC1in_11n GND ADCclk1n address_5 GND dir_trans GND ADC_SDENB_3 VCCIO7A GND GND VCCIO7A vme_data_13 ADC3in_3n vme_data_21 vme_data_0 ADC2in_1 vme_data_2 ADC3in_10n vme_data_1 ADC1in_5n ADC1in_5 ADC0in_11 ADC1in_3 ADC0in_7n am_4 ADC0in_3 am_3 ADC1in_11 ADC1in_4 address_6 ADCclk1 address_4 address_3 address_2 _ds_1 MSEL0 ADC_ENABLE ADC_SDENB_2 ADC_SDIO_2 3_XCLK ADC_SDIO_1 ADC3in_6n ADC_SYNCIN_1n VCCIO7D ADC3in_10 vme_data_23 VCCIO8D ADC1in_7 addr_11 VCCIO8C ADC0in_7 ADC0in_2n VCCIO8B am_0 ADC0in_0n VCCIO8A ADC1in_4n _ga_4 VCCIO8A _dtack _ds_0 nCONFIG CONF_DONE ADC_SDENB_1 GND ADC3in_7n GND ADC3in_5n ADC3in_6 ADC2in_6n ADC2in_0 ADC2in_0n vme_data_8 ADC1in_7n GND _berr ADC0in_1n GND ADC0in_12n ADC0in_2 GND ADC0in_0 _ga_1 GND _ga_2 _ga_3 GND sysclk GND nSTATUS ADC_SDENB_0 ADC_SDIO_0 ADC3in_7 ALTERA_CRC_ERROR_OPEN_DRAIN VCCIO7A ADC3in_5 ADC2in_2n ADC2in_6 VCCIO7B vme_data_30 ADC3in_3 VCCIO7C vme_data_9 DigIn_1 ADC6in_11 VCCIO3C ADC6in_2n ADC6in_2 VCCIO3B ADC7in_5n ADC7in_5 ADC7in_6n ADC7in_6 master_clock1 ADC7in_3 master_clockn master_clock AS_DATA2 GND QSFP_Control_5 ADC3in_8n GND QSFP_Control_4 ADC2in_2 GND QSFP_Control_6 ADC2in_5n GND ADC3in_1n ADC3in_9n GND ADC_SYNCIN_1 DigIn_0n GND GND ADC7in_8n ADC7in_8 GND ADC_SCLK_2 ADC_SCLK_1 GND master_clock1n ADC7in_3n GND TCK AS_DATA1 AS_DATA0_ASDO ADC5in_1n ADC5in_12n ADC5in_12 ADC5in_6 ADC5in_6n 3_RXD_2 3_RXD_1 VCCIO4B ADC_SYNCIN_7n ADC_SYNCIN_7 VCCIO4C ADC_SYNCOUT_3 ADC4in_9 VCCIO4D 2_RXD_1 1_TXD_8 VCCIO3D ADC7in_0 VCCIO3A 0_XCLK 0_RXD_6 0_RXD_12 0_RXD_14 DCLK AS_DATA3 nCSO_DATA4 GND ADC5in_1 GND ADC5in_7 3_RXD_12 GND ADC_SYNCIN_6 ADC_SYNCIN_6n GND ADC4in_8 ADC_SYNCOUT_3n GND ADC4in_9n 2_RXD_2 GND 1_TXD_7 DigIn_1n GND ADC6in_11n ADC6in_3 ADC7in_1 0_RXD_5 0_RXD_7 0_RXD_13 0_RXD_15 GND GND RREF 3_RXD_14 3_RXD_13 ADC5in_7n 3_RXD_11 ADC5in_0 ADC4in_11 VCCIO4B 2_TXD_8 ADC4in_8n VCCIO4C ADC4in_12 ADC5in_2 VCCIO4D ADC5in_11 1_TXD_6 VCCIO3D ADC_SYNCIN_5 ADC7in_12 VCCIO3C ADC6in_3n 0_TXD_1 VCCIO3B ADC7in_4 ADC7in_7 VCCIO3A GND GND GND GND GND GND GND ADC4in_4n ADC4in_4 3_RXD_15 ADC5in_0n ADC4in_11n 2_TXD_13 2_TXD_7 2_TXD_1 ADC4in_10 ADC4in_12n ADC5in_2n ADC5in_10 ADC5in_11n 1_TXD_5 ADC_SYNCIN_4 ADC_SYNCIN_5n ADC7in_12n ADC6in_5n ADC6in_5 0_TXD_2 0_TXD_8 ADC7in_4n ADC7in_0n ADC7in_7n GND GND GND QSFP_Rx0_3 QSFP_Rx0_3n GND GND VCCIO4A addr_16 GND ADC4in_7 2_TXD_12 GND addr_19 ADC4in_10n GND 2_RXD_12 ADC5in_10n GND ADC_SYNCIN_0 ADC_SYNCIN_4n GND 1_RXD_5 ADC6in_1 GND ADC_SCLK_3 ADC6in_7 GND ADC7in_10 ADC7in_1n GND GND GND GND GND GND GND QSFP_Tx0_3 QSFP_Tx0_3n GND 3_RXD_10 ADCclk4 ADC4in_7n VCCIO4B ADC4in_0 ADC_SYNCOUT_0 VCCIO4C ADC4in_2 addr_20 VCCIO4D ADC5in_3 ADC_SYNCIN_0n VCCIO3D 1_TXD_13 1_RXD_6 VCCIO3C ADC6in_1n ADC6in_10 VCCIO3B ADC6in_7n ADC7in_10n VCCIO3A ADC7in_11 GND GND GND GND GND GND VCCIO4A 3_RXD_9 ADCclk4n ADC_SYNCIN_3 ADC_SYNCIN_2 ADC4in_0n ADC_SYNCOUT_0n ADC4in_6 ADC4in_2n 2_RXD_11 ADC5in_9 ADC5in_3n 0_RX_CLK 3_RX_CLK 1_TXD_14 ADC6in_9 ADC6in_6n ADC6in_6 ADC6in_10n ADC6in_8n ADC6in_8 0_TXD_14 ADC7in_2 ADC7in_11n 0_RXD_8 VCCIO3A GND GND GND GND GND GND GND ADCclk5 GND ADC_SYNCIN_3n ADC_SYNCIN_2n GND ADC4in_1 ADC4in_6n GND 2_RXD_10 ADC5in_9n GND 2_RX_CLK 1_RX_CLK GND ADC6in_9n 1_RXD_7 GND ADC6in_4 0_TXD_9 GND 0_TXD_15 ADC7in_2n GND 1_XCLK GND GND GND QSFP_Rx0_0 QSFP_Rx0_0n GND GND VCCIO4A ADCclk5n 3_RXD_5 3_RXD_0 VCCIO4B 2_TXD_6 ADC4in_1n VCCIO4C ADC4in_5 ADC5in_5 VCCIO4D 2_RXD_7 ADCclk7 VCCIO3D 2_RXD_0 ADC6in_12 VCCIO3C 1_TXD_12 ADC6in_4n VCCIO3B 0_TXD_11 1_RXD_13 VCCIO3A 0_RXD_0 0_RXD_9 TMS GND GND GND GND QSFP_Tx0_0 QSFP_Tx0_0n GND 3_RXD_8 3_RXD_4 addr_26 2_TXD_11 2_TXD_5 2_TXD_0 ADC4in_3 ADC4in_5n ADC5in_5n 2_RXD_6 1_TXD_11 ADCclk7n ADCclk6 1_RXD_0 ADC6in_12n 1_RXD_8 1_RXD_14 0_TXD_3 0_TXD_10 ADC6in_0 0_RXD_1 clkswitch 0_RXD_4 0_RXD_10 GND GND QSFP_Rx0_2 QSFP_Rx0_2n GND GND VCCIO4A 3_RXD_7 GND 2_TXD_15 2_TXD_10 GND 2_RXD_15 ADC4in_3n GND ADC5in_4 2_RXD_5 GND ADCclk6n GND 1_TXD_15 1_RXD_9 GND 0_TXD_4 ADC6in_0n GND 0_RXD_2 0_RXD_3 GND 0_RXD_11 VCCIO3A GND GND GND GND GND QSFP_Tx0_2 QSFP_Tx0_2n GND 3_RXD_6 3_RXD_3 2_TXD_14 2_TXD_9 2_TXD_4 ADC_SYNCOUT_1n ADC_SYNCOUT_1 DigOutput ADC5in_4n 2_RXD_4 1_TXD_10 1_TXD_4 1_TXD_1 1_RXD_1 addr_25 1_RXD_10 1_RXD_15 0_TXD_5 ADC7in_9n ADC7in_9 VCCPGM VCCPD3 TDO TDI GND GND GND GND GND VCCPD4A GND GND VCCPD4A 2_TXD_3 ADC_SYNCOUT_2n ADC_SYNCOUT_2 DigOutputn 2_RXD_9 2_RXD_3 1_TXD_9 1_TXD_3 clkswitchcontrol 1_RXD_2 1_RXD_3 1_RXD_11 0_TXD_0 0_TXD_6 ADC_SCLK_0 0_TXD_12 VCCPD3 GND GND GND GND GND GND GND QSFP_Tx0_1 QSFP_Tx0_1n VCCR_GXBR VCCR_GXBR gx_pll_refclkin1n gx_pll_refclkin1 GND 2_TXD_2 GND 2_RXD_13 GND 2_RXD_8 ADC5in_8 GND 1_TXD_2 1_TXD_0 GND 1_RXD_4 1_RXD_12 GND 0_TXD_7 GND 0_TXD_13 GND GND GND VCCR_GXBL VCCR_GXBL GND GND QSFP_Rx0_1 QSFP_Rx0_1n QSFP_Control_2 ADC2in_8n ADC2in_8 QSFP_Control_3 VCCIO7B ADC2in_5 ADC3in_1 VCCIO7C ADC3in_9 DigIn_0 VCCIO7D ADCclk3 ADCclk3n VCCIO8D ADC1in_9 ADC1in_9n VCCIO8C ADC0in_1 ADC0in_12 VCCIO8B ADC0in_8n ADC0in_8 _ga_0 ADC1in_12n ADC1in_12 ADC1in_1n ADC1in_1 _as nCE GND GND HS addr_2 addr_3 addr_4 addr_5 addr_6 addr_7 addr_8 addr_9 addr_10 addr_11 addr_12 addr_13 addr_14 addr_15 addr_16 addr_17 addr_18 addr_19 addr_20 addr_21 addr_22 addr_23 addr_24 addr_25 addr_26 vmeas vmeds vmewrite QSFP_Control_0 ADC3in_8 QSFP_Control_1 VCCA_GXBL1 VCCA_FPLL VCCH_GXBR1 VCCH_GXBR0 VCCH_GXBL1 VCCH_GXBL0 VCCD_FPLL VCCBAT VCCIO8B VCCIO8C VCCIO8D VCCPD8 CRC_ERROR_IN ALTERA_CRC_ERROR_OPEN_DRAIN VIO_2.5V master_clock1 mc HS master_clock1n mc HS df_15 gx_pll_refclkin1 HS df_15 gx_pll_refclkin1n VCCIO3A VCCIO3B VCCIO3C VCCIO3D VCCIO4A VCCIO4B VCCIO4C VCCIO4D VCCIO7A VCCIO7B VCCIO7C VCCIO7D VCCPD3 VCCPD4A VCCPD4BCD VCCPD7A VCCPD7BCD VCCIO8A VCCL_GXBR0 VCCL_GXBR1 VCCL_GXBL0 VCCL_GXBL1 VCCR_GXBR VCCR_GXBL VCCT_GXBR0 VCCT_GXBR1 VCCT_GXBL0 VCCT_GXBL1 VCC_AUX VCCA_GXBR0 VCCA_GXBR1 VCCA_GXBL0 df_19 HS ADC_CLK3n df_19 HS VCCIO8A VIO_2.5V VCC VCCP VCCPGM ADC_CLK1 df_3 ADC_CLK1n df_3 ADC_CLK2 df_5 ADC_CLK2n df_5 ADC_CLK3 df_7 ADC_CLK3n df_7 ADC_CLK0 df_16 HS ADC_CLK0n df_16 HS ADC_CLK1 df_17 HS ADC_CLK1n df_17 HS ADC_CLK2 df_18 HS ADC_CLK2n df_18 HS ADC_CLK3 diff-31_15 ADC_SYNCIN_6n ADC_SYNCIN_6 diff-31_15 3_ADC_CTRL(5:0) ADC_SRESET_3 ADC_SCLK_3 ADC_SDENB_3 ADC_ENABLE ADC_SDIO_3 ADC_SDO_3 3_ADC_SYNC(1:0) ADC_SYNCOUT_3 df_6 ADC_SYNCOUT_3n df_6 3_ADC_CLK(1:0) 3_ADC_2_OUT[29:0] ADC_SYNCIN_7n diff-32_15 diff-32_15 ADC_SYNCIN_7 clkswitchcontrol clkswitch VCCIO8A diff-22_9 ADC5in_8n 70, 61 ADC5in_7n diff-22_8 70, 61 ADC5in_6n diff-22_7 70, 61 ADC5in_5n diff-22_6 70, 61 ADC5in_4n diff-22_5 70, 61 diff-22_4 ADC5in_3n 70, 61 ADC5in_2n diff-22_3 70, 61 ADC5in_1n diff-22_2 70, 61 ADC5in_0n diff-22_1 70, 61 diff-22_15 ADC_SYNCIN_5n ADC_SYNCIN_5 diff-22_15 3_ADC_1_OUT[29:0] diff-21_15 diff-21_15 ADC_SYNCIN_4 2_ADC_CTRL(5:0) ADC_SRESET_2 ADC_SCLK_2 ADC_SDENB_2 ADC_ENABLE ADC_SDIO_2 ADC_SDO_2 2_ADC_SYNC(1:0) ADC_SYNCOUT_2 df_4 ADC_SYNCOUT_2n df_4 2_ADC_CLK(1:0) 2_ADC_2_OUT[29:0] ADC5in_12n diff-22_13 70, 61 ADCclk5n diff-22_14 70, 61 ADC5in_11n diff-22_12 70, 61 ADC5in_10n diff-22_11 70, 61 ADC5in_9n diff-22_10 70, 61 ADC_CLK0n df_1 0_ADC_2_OUT[29:0] diff-02_15 ADC_SYNCIN_1 ADC_SYNCIN_1n diff-02_15 1_ADC_1_OUT[29:0] diff-11_15 ADC_SYNCIN_2 ADC_SYNCIN_2n diff-11_15 1_ADC_CTRL(5:0) ADC_SRESET_1 ADC_SCLK_1 ADC_SDENB_1 ADC_ENABLE ADC_SDIO_1 ADC_SDO_1 1_ADC_SYNC(1:0) ADC_SYNCOUT_1 df_2 ADC_SYNCOUT_1n df_2 1_ADC_CLK(1:0) 1_ADC_2_OUT[29:0] ADC_SYNCIN_3 diff-12_15 diff-12_15 ADC_SYNCIN_3n 2_ADC_1_OUT[29:0] ADC_SYNCIN_4n 3_RXD_1 3_RXD_2 3_RXD_3 3_RXD_4 3_RXD_11 3_RXD_15 3_RXD_5 3_RXD_13 3_RXD_12 3_RX_CLK 3_XCLK ADC_SYNCIN_0 diff-01_15 diff-01_15 ADC_SYNCIN_0n 0_ADC_CTRL(5:0) ADC_SRESET_0 ADC_SCLK_0 ADC_SDENB_0 ADC_ENABLE ADC_SDIO_0 ADC_SDO_0 0_ADC_SYNC(1:0) ADC_SYNCOUT_0 df_0 ADC_SYNCOUT_0n df_0 0_ADC_CLK(1:0) ADC_CLK0 df_1 3_TXD_4 3_TXD_5 3_TXD_6 3_TXD_7 3_TXD_8 3_TXD_9 3_TXD_10 3_TXD_11 3_TXD_12 3_TXD_13 3_TXD_14 3_TXD_15 3_RXD[15:0] 3_RXD_6 3_RXD_7 3_RXD_8 3_RXD_9 3_RXD_10 3_RXD_14 3_RXD_0 2_TXD_15 2_RXD[15:0] 2_RX_CLK 2_XCLK 2_RXD_0 2_RXD_1 2_RXD_2 2_RXD_3 2_RXD_4 2_RXD_5 2_RXD_6 2_RXD_7 2_RXD_8 2_RXD_9 2_RXD_10 2_RXD_11 2_RXD_12 2_RXD_13 2_RXD_14 2_RXD_15 3_TXD(15:0) 3_TXD_0 3_TXD_1 3_TXD_2 3_TXD_3 1_XCLK 2_TXD(15:0) 2_TXD_0 2_TXD_1 2_TXD_2 2_TXD_3 2_TXD_4 2_TXD_5 2_TXD_6 2_TXD_7 2_TXD_8 2_TXD_9 2_TXD_10 2_TXD_11 2_TXD_12 2_TXD_13 2_TXD_14 1_TXD_10 1_TXD_11 1_TXD_12 1_TXD_13 1_TXD_14 1_TXD_15 1_RXD[15:0] 1_RXD_6 1_RXD_7 1_RXD_8 1_RXD_9 1_RXD_10 1_RXD_14 1_RXD_0 1_RXD_1 1_RXD_2 1_RXD_3 1_RXD_4 1_RXD_11 1_RXD_15 1_RXD_5 1_RXD_13 1_RXD_12 1_RX_CLK 0_RXD_5 0_RXD_6 0_RXD_7 0_RXD_8 0_RXD_9 0_RXD_10 0_RXD_11 0_RXD_12 0_RXD_13 0_RXD_14 0_RXD_15 1_TXD(15:0) 1_TXD_0 1_TXD_1 1_TXD_2 1_TXD_3 1_TXD_4 1_TXD_5 1_TXD_6 1_TXD_7 1_TXD_8 1_TXD_9 address_27 address_28 address_29 address_30 address_31 0_ADC_1_OUT[29:0] samplingclock samplingclockn DigIO(15:0) DigIn_0 df_11 HS DigIn_1 df_12 HS DigOutput df_13 HS DigIn_0n df_11 HS DigIn_1n df_12 HS DigOutputn df_13 HS 0_RXD_0 0_RXD_1 0_RXD_2 0_RXD_3 0_RXD_4 _ga_2 _ga_3 _ga_4 _iack am_2 am_5 am_0 address_2 address_3 address_4 address_5 address_6 address_7 address_8 address_9 address_10 address_11 address_12 address_13 address_14 address_15 address_16 address_17 address_18 address_19 address_20 address_21 address_22 address_23 address_24 address_25 address_26 0_TXD_11 0_TXD_12 0_TXD_13 0_TXD_14 0_TXD_15 LocalVMEaux[31:0] 0_RXD[15:0] 0_RX_CLK 0_XCLK VME_Addr(31:2) VME_ETC(30:0) _as sysclk _ds_1 _lword _ds_0 _vme_write am_4 _berr am_3 am_1 _dtack _ga_0 _ga_1 VCCPGM VCCPGM DCLK TTL 0_TXD(15:0) 0_TXD_0 0_TXD_1 0_TXD_2 0_TXD_3 0_TXD_4 0_TXD_5 0_TXD_6 0_TXD_7 0_TXD_8 0_TXD_9 0_TXD_10 AS_DATA0_ASDO TTL AS_DATA1 nCSO_DATA4 TTL TTL AS_DATA3 VCCPGM AS_DATA2 TTL RREF_F34 TDI TCK TDO TMS VCCPGM VCCPGM QSFP_Rx[7:0] I1_12 QSFP_Rx0_0 I1_13 QSFP_Rx0_1 I1_14 QSFP_Rx0_2 I1_14 QSFP_Rx0_2n I1_15 QSFP_Rx0_3 transceivers_OE VIO_2.5V VIO_3.0V I1_15 QSFP_Rx0_3n I1_13 QSFP_Rx0_1n I1_12 QSFP_Rx0_0n I1_11 QSFP_Tx0_3n I1_10 QSFP_Tx0_2n QSFP_Tx0_1n I1_9 I1_8 QSFP_Tx0_0n TTL MSEL3 VCCPGM VCCPGM VCCPGM VCCPGM VCCPGM VCCPGM VIO_3.0V VCCP_1.1V VCC_1.1V LR_GXB_1.15V T_GXB_1.15V H_GXB_1.5V VAUX_2.5V QSFP_Tx[7:0] I1_8 QSFP_Tx0_0 I1_9 QSFP_Tx0_1 I1_10 QSFP_Tx0_2 I1_11 QSFP_Tx0_3 LR_GXB_1.15V T_GXB_1.15V VCC_1.1V VAUX_2.5V QSFP_Control[6:0] QSFP_Control_0 QSFP_Control_1 QSFP_Control_2 QSFP_Control_3 QSFP_Control_4 QSFP_Control_5 QSFP_Control_6 master_clock df_14 HS master_clockn df_14 HS MSEL4 vme_data_20 vme_data_21 vme_data_22 vme_data_23 vme_data_24 vme_data_25 vme_data_26 vme_data_27 vme_data_28 vme_data_29 vme_data_30 vme_data_31 dir_trans H_GXB_1.5V RREF VCCP_1.1V GND GND nCSO_DATA4 CONF_DONE DCLK nCONFIG AS_DATA1 AS_DATA0_ASDO VME_Data[31:0] vme_data_0 vme_data_1 vme_data_2 nCE vme_data_3 vme_data_4 vme_data_5 vme_data_6 vme_data_7 vme_data_8 vme_data_9 vme_data_10 vme_data_11 vme_data_12 vme_data_13 vme_data_14 vme_data_15 vme_data_16 vme_data_17 vme_data_18 vme_data_19 led_1 led_0 led_2 +3.3V GND GND nCE MSEL2 MSEL0 MSEL1 nSTATUS CONF_DONE nCONFIG
Transcript of 2835 Sheet 6
2.5V1:4 LVDS Buffer
DecouplingFPGA 1Input
The University of Chicago
500MHz 16Ch ADC Module
A 2835
FPGA - 1
610/16/2014
17
Drawn by: M. Bogdan
M. Bogdan
3.0V
3.0V
JTAG Connector
Sheet 7
A
USB-Blaster
Engineer:
DATE:
REV. DRW. Sheet
10
8
4
US510
5
VCC214
VR10
11 VT
9 _IN
1
15
PAD319
PAD420
Q015
16Q0n
1Q1
Q1n2
3Q2
Q2n4
Q35
6Q3n
7VCC1
6
5
14
F_44SY89832U
8 EN
GND13
IN12
17PAD118PAD2
5
3
11
15
5
7
2526
1
12
13
25
10
5
JT52
28
3
24
7
1
2
12
6
8
2829
6
2
JT55
4
2
27
11
9
LED5
green
56
6
7
7
9
11
31 0
21
28
13
14
9
7
5
6
2
27
8
0
17
15
15
5
2
13
27
26
22
11
4
2
10KF_13
8
F_29
cap0603
0.1uF
24
30
26
4
20
18
16
10
1
29
4
49F_6
3
14
9
2
F_17 10K
17
19
0
26
4
4
0
23
1516
3
0
1
7
29
240
F_12
11
4
1
1
10
23
21
19
9
16
15
1
7
4
F_31
cap0603
0.1uF
3
F_48 10K
22
20
14
8
JT56
0
0F_50
9
22
11
12
13
25
13
1
2
9
7
8
56
11
25
23
0
21
12
13
18
12
2021
9
3
11
4
6
21
4
2
0
29 28
8
23
7
4
2
5
6
7
5
F_32
0.1uF
cap0603
13
18
23
26
10
14
56pFcap0402
10
1
25
0
1
0
6
2
F_9
4
0
1
2
10
14
3
10
9
8
8
9
10
0
29
222324
1314
24
JT54
JT510
15
8
6
5
6
10
7
12
6
6
4
2
1
17
9
5
3
14
12
1010
27
11
7
25
US5
VCC_W23VCC_Y13VCC_Y20
nCE_A33nCONFIG_C33
nCSO_AM34
nSTATUS_B34
6
VCC_V14VCC_V16
VCC_V18
VCC_V20VCC_V22VCC_V24VCC_W13VCC_W15VCC_W17VCC_W19VCC_W21
VCC_U11VCC_U12VCC_U13VCC_U15VCC_U17VCC_U19VCC_U20VCC_U21VCC_U22VCC_U23VCC_V12
VCC_R19VCC_R23VCC_R25VCC_T12VCC_T14VCC_T16VCC_T18VCC_T20VCC_T22VCC_T24
VCCT_GXBL1_T30
VCCT_GXBR0_W6VCCT_GXBR0_Y5
VCCT_GXBR1_R6VCCT_GXBR1_T5
VCC_AUX_P12VCC_AUX_P24
VCC_AUX_W11VCC_AUX_Y24
VCC_R14VCC_R15
VCCR_GXBL_N30VCCR_GXBL_U29VCCR_GXBL_U30VCCR_GXBR_AA5VCCR_GXBR_AA6VCCR_GXBR_N5VCCR_GXBR_U5VCCR_GXBR_U6VCCT_GXBL0_W29VCCT_GXBL0_Y30
VCCT_GXBL1_R29
VCCP_R21VCCP_T10VCCP_U25VCCP_V10VCCP_W25VCCP_Y12VCCP_Y19VCCP_Y22
VCCR_GXBL_AA29VCCR_GXBL_AA30
VCCPD7BCD_P14VCCPD7BCD_P16VCCPD7BCD_R11VCCPD8_N26VCCPD8_N27VCCPD8_P20VCCPD8_P22
VCCPGM_AC26VCCPGM_M9
VCCP_P18VCCP_R13
VCCPD3_AB26VCCPD3_AC27VCCPD3_Y21VCCPD3_Y25VCCPD4A_AB6VCCPD4A_AB9VCCPD4BCD_Y10VCCPD4BCD_Y14VCCPD4BCD_Y16VCCPD7A_N8VCCPD7A_N9
VCCIO8D_F18
VCCIO8D_J18
VCCL_GXBL0_V29VCCL_GXBL0_V30
VCCL_GXBL1_P29VCCL_GXBL1_P30
VCCL_GXBR0_V5VCCL_GXBR0_V6
VCCL_GXBR1_P5VCCL_GXBR1_P6
VCCIO8A_M26VCCIO8B_A24VCCIO8B_C24VCCIO8B_F24VCCIO8B_J24VCCIO8C_A21VCCIO8C_C21VCCIO8C_F21VCCIO8C_J21VCCIO8D_A18VCCIO8D_C18
VCCIO7C_F12VCCIO7C_J12VCCIO7D_A15VCCIO7D_C15VCCIO7D_F15VCCIO7D_J15VCCIO8A_C27VCCIO8A_C30VCCIO8A_F27VCCIO8A_F30VCCIO8A_J29
VCCIO7A_C5VCCIO7A_F2VCCIO7A_F5VCCIO7A_L7VCCIO7B_A9VCCIO7B_C9VCCIO7B_F9VCCIO7B_J9VCCIO7C_A12VCCIO7C_C12
VCCIO4B_AJ9VCCIO4B_AM9VCCIO4B_AP9VCCIO4C_AF12VCCIO4C_AJ12VCCIO4C_AM12VCCIO4C_AP12VCCIO4D_AF15VCCIO4D_AJ15VCCIO4D_AM15VCCIO4D_AP15
VCCIO3C_AM21VCCIO3C_AP21VCCIO3D_AF18VCCIO3D_AJ18VCCIO3D_AM18VCCIO3D_AP18VCCIO4A_AD5VCCIO4A_AF5VCCIO4A_AH5VCCIO4A_AK5VCCIO4B_AF9
VCCIO3A_AH30VCCIO3A_AJ27VCCIO3A_AK30VCCIO3A_AM27VCCIO3B_AF24VCCIO3B_AJ24VCCIO3B_AM24VCCIO3B_AP24VCCIO3C_AF21VCCIO3C_AJ21
VCCD_FPLL_P9
VCCD_FPLL_R16
VCCD_FPLL_Y17
VCCD_FPLL_Y26VCCD_FPLL_Y9
VCCH_GXBL0_V28
VCCH_GXBL1_P28VCCH_GXBR0_V7
VCCH_GXBR1_P7
VCCIO3A_AD30VCCIO3A_AF27
VCCA_FPLL_T26VCCA_FPLL_T9
VCCA_FPLL_V26VCCA_FPLL_V9
VCCA_FPLL_Y18
VCCA_GXBL0_Y28
VCCA_GXBL1_T28VCCA_GXBR0_Y7
VCCA_GXBR1_T7
VCCBAT_M28
VCCD_FPLL_P26REFCLK3Lp_R26
REFCLK3Rn_R8REFCLK3Rp_R9
RREF_BR_AM1
RREF_TL_F34
TCK_AN32TDI_AC29
TDO_AC28TMS_AF30
VCCA_FPLL_R17
REFCLK0Rn_AA7REFCLK0Rp_AA8
REFCLK1Ln_W27REFCLK1Lp_W26
REFCLK1Rn_W8REFCLK1Rp_W9
REFCLK2Ln_U27REFCLK2Lp_U26
REFCLK2Rn_U8REFCLK2Rp_U9
REFCLK3Ln_R27
IO_P11
IO_Y11
IO_Y15
IO_Y23
MSEL0_D34MSEL1_H30MSEL2_K30MSEL3_M29MSEL4_M30
REFCLK0Ln_AA28REFCLK0Lp_AA27
IO_N16
IO_N17
IO_N18
IO_N19
IO_N20
IO_N21
IO_N22
IO_N23
IO_N24
IO_N25
IO_M24
IO_M25
IO_M27
IO_M7
IO_M8
IO_N10IO_N11
IO_N12
IO_N13
IO_N14IO_N15
IO_M13
IO_M14IO_M15
IO_M16
IO_M17
IO_M18
IO_M19
IO_M20
IO_M21
IO_M22
IO_M23
IO_L23
IO_L24
IO_L26
IO_L27
IO_L29
IO_L6
IO_L9
IO_M10
IO_M11
IO_M12
IO_K6
IO_K7
IO_K8IO_K9
IO_L11
IO_L12
IO_L14
IO_L15
IO_L17
IO_L20
IO_L21
IO_K19
IO_K20
IO_K21
IO_K22
IO_K23
IO_K24
IO_K25
IO_K26
IO_K27
IO_K28
IO_K29
IO_J8
IO_K10
IO_K11
IO_K12
IO_K13
IO_K14
IO_K15
IO_K16
IO_K17
IO_K18
IO_J17
IO_J19
IO_J20
IO_J22
IO_J23
IO_J25
IO_J26
IO_J27
IO_J28
IO_J6
IO_J7
IO_H26
IO_H27
IO_H29
IO_H6
IO_H8
IO_H9
IO_J10
IO_J11
IO_J13
IO_J14
IO_J16
IO_H11
IO_H12
IO_H14
IO_H15
IO_H17
IO_H18
IO_H20
IO_H21
IO_H23
IO_H24
IO_G23
IO_G24
IO_G25
IO_G26
IO_G27IO_G28
IO_G29
IO_G6
IO_G7IO_G8
IO_G9
IO_G12
IO_G13
IO_G14
IO_G15
IO_G16
IO_G17
IO_G18IO_G19
IO_G20
IO_G21
IO_G22
IO_F23
IO_F25
IO_F26
IO_F28IO_F29
IO_F6
IO_F7
IO_F8
IO_G10
IO_G11
IO_E9
IO_F1
IO_F10
IO_F11
IO_F13
IO_F14
IO_F16
IO_F17
IO_F19
IO_F20
IO_F22
IO_E24
IO_E26
IO_E27
IO_E29
IO_E3
IO_E30
IO_E32
IO_E4
IO_E5
IO_E6
IO_E8
IO_E11
IO_E12
IO_E14
IO_E15
IO_E17
IO_E18
IO_E2
IO_E20
IO_E21
IO_E23
IO_D3
IO_D30
IO_D31
IO_D32
IO_D33
IO_D5
IO_D6
IO_D7
IO_D8IO_D9
IO_E1
IO_D19
IO_D20
IO_D21
IO_D22
IO_D23
IO_D24
IO_D25
IO_D26
IO_D27
IO_D28
IO_D29
IO_D1
IO_D10
IO_D11
IO_D12
IO_D13IO_D14
IO_D15
IO_D16
IO_D17
IO_D18
IO_C25
IO_C26
IO_C28IO_C29
IO_C3
IO_C31
IO_C32
IO_C4
IO_C6
IO_C7
IO_C8
IO_C10
IO_C11
IO_C13
IO_C14
IO_C16
IO_C17
IO_C19
IO_C2
IO_C20
IO_C22
IO_C23
IO_B27
IO_B29
IO_B3
IO_B30
IO_B32
IO_B5
IO_B6
IO_B8
IO_B9
IO_C1
IO_B12
IO_B14
IO_B15
IO_B17
IO_B18
IO_B2
IO_B20IO_B21
IO_B23
IO_B24
IO_B26
IO_AP29
IO_AP3
IO_AP30
IO_AP31IO_AP32
IO_AP4
IO_AP5IO_AP6
IO_AP7IO_AP8
IO_B11IO_AP17
IO_AP19
IO_AP2
IO_AP20
IO_AP22IO_AP23
IO_AP25IO_AP26
IO_AP27IO_AP28
IO_AN3
IO_AN30
IO_AN5
IO_AN6
IO_AN8IO_AN9
IO_AP10
IO_AP11
IO_AP13
IO_AP14
IO_AP16
IO_AN14
IO_AN15
IO_AN17
IO_AN18
IO_AN20
IO_AN21
IO_AN23IO_AN24
IO_AN26IO_AN27
IO_AN29
IO_AM3
IO_AM30
IO_AM31
IO_AM4
IO_AM5
IO_AM6IO_AM7
IO_AM8
IO_AN11
IO_AN12
IO_AM14
IO_AM16
IO_AM17
IO_AM19
IO_AM20
IO_AM22
IO_AM23
IO_AM25
IO_AM26
IO_AM28
IO_AM29
IO_AL30
IO_AL31
IO_AL4IO_AL5
IO_AL6
IO_AL7
IO_AL8
IO_AL9
IO_AM10
IO_AM11
IO_AM13
IO_AL20
IO_AL21IO_AL22
IO_AL23
IO_AL24
IO_AL25
IO_AL26
IO_AL27
IO_AL28
IO_AL29
IO_AK9
IO_AL10
IO_AL11
IO_AL12
IO_AL13
IO_AL14
IO_AL15
IO_AL16
IO_AL17
IO_AL18
IO_AL19
IO_AK17
IO_AK18
IO_AK20
IO_AK21
IO_AK23IO_AK24
IO_AK26
IO_AK27
IO_AK29
IO_AK6
IO_AK8
IO_AJ26
IO_AJ28
IO_AJ29
IO_AJ6
IO_AJ7
IO_AJ8
IO_AK11
IO_AK12
IO_AK14
IO_AK15
IO_AJ10
IO_AJ11
IO_AJ13
IO_AJ14
IO_AJ16
IO_AJ17
IO_AJ19
IO_AJ20
IO_AJ22
IO_AJ23
IO_AJ25
IO_AH23
IO_AH24IO_AH25
IO_AH26
IO_AH27
IO_AH28
IO_AH29
IO_AH6
IO_AH7
IO_AH8
IO_AH9
IO_AH13
IO_AH14
IO_AH15
IO_AH16
IO_AH17
IO_AH18
IO_AH19
IO_AH20
IO_AH21IO_AH22
IO_AG23
IO_AG24
IO_AG26
IO_AG27
IO_AG29
IO_AG6
IO_AG8
IO_AG9
IO_AH10
IO_AH11IO_AH12
IO_AF6
IO_AF7
IO_AF8
IO_AG11
IO_AG12
IO_AG14
IO_AG15
IO_AG17
IO_AG18
IO_AG20
IO_AG21
IO_AF16
IO_AF17
IO_AF19
IO_AF20
IO_AF22
IO_AF23
IO_AF25
IO_AF26
IO_AF28
IO_AF29
IO_AE27
IO_AE28
IO_AE29
IO_AE6
IO_AE7
IO_AE8
IO_AE9
IO_AF10
IO_AF11
IO_AF13
IO_AF14
IO_AE16
IO_AE17
IO_AE18
IO_AE19
IO_AE20
IO_AE21IO_AE22
IO_AE23IO_AE24
IO_AE25
IO_AE26
IO_AD29
IO_AD6
IO_AD8
IO_AD9
IO_AE10
IO_AE11
IO_AE12
IO_AE13
IO_AE14IO_AE15
IO_AD11
IO_AD12
IO_AD14
IO_AD15
IO_AD17
IO_AD20
IO_AD21
IO_AD23
IO_AD24
IO_AD26IO_AD27
IO_AC19
IO_AC20
IO_AC21
IO_AC22
IO_AC23
IO_AC24IO_AC25
IO_AC6IO_AC7
IO_AC8
IO_AC9
IO_AB25
IO_AC10
IO_AC11IO_AC12
IO_AC13
IO_AC14IO_AC15
IO_AC16
IO_AC17IO_AC18
IO_AB14
IO_AB15
IO_AB16
IO_AB17
IO_AB18
IO_AB19
IO_AB20
IO_AB21
IO_AB22
IO_AB23
IO_AB24
IO_AA15
IO_AA17
IO_AA18
IO_AA20
IO_AA21
IO_AA23
IO_AA25
IO_AB10
IO_AB11IO_AB12
IO_AB13
IO_A31
IO_A32
IO_A4IO_A5
IO_A6IO_A7
IO_A8
IO_AA10
IO_AA12
IO_AA14
IO_A2
IO_A20
IO_A22
IO_A23
IO_A25IO_A26
IO_A27
IO_A28IO_A29
IO_A3
IO_A30
GXT_R8n_N4GXT_R8p_N3
GXT_R9n_L4GXT_R9p_L3
IO_A10
IO_A11
IO_A13
IO_A14
IO_A16IO_A17
IO_A19
GXT_R3n_AC4GXT_R3p_AC3
GXT_R4n_AA4GXT_R4p_AA3
GXT_R5n_W4GXT_R5p_W3
GXT_R6n_U4GXT_R6p_U3
GXT_R7n_R4GXT_R7p_R3
GXT_L9p_L32
GXT_R0n_AJ4GXT_R0p_AJ3
GXT_R10n_J4GXT_R10p_J3
GXT_R11n_G4GXT_R11p_G3
GXT_R1n_AG4GXT_R1p_AG3
GXT_R2n_AE4GXT_R2p_AE3
GXT_L4n_AA31GXT_L4p_AA32
GXT_L5n_W31GXT_L5p_W32
GXT_L6n_U31GXT_L6p_U32
GXT_L7n_R31GXT_L7p_R32
GXT_L8n_N31GXT_L8p_N32
GXT_L9n_L31
GXT_L10n_J31GXT_L10p_J32
GXT_L11n_G31GXT_L11p_G32
GXT_L1n_AG31GXT_L1p_AG32
GXT_L2n_AE31GXT_L2p_AE32
GXT_L3n_AC31GXT_L3p_AC32
GXCK_R5p_Y1
GXCK_R6n_V2GXCK_R6p_V1
GXCK_R7n_T2GXCK_R7p_T1
GXCK_R8n_P2GXCK_R8p_P1
GXCK_R9n_M2GXCK_R9p_M1
GXT_L0n_AJ31GXT_L0p_AJ32
GXCK_R11n_H2GXCK_R11p_H1
GXCK_R1n_AH2GXCK_R1p_AH1
GXCK_R2n_AF2GXCK_R2p_AF1
GXCK_R3n_AD2GXCK_R3p_AD1
GXCK_R4n_AB2GXCK_R4p_AB1
GXCK_R5n_Y2
GXCK_L7n_T33GXCK_L7p_T34
GXCK_L8n_P33GXCK_L8p_P34
GXCK_L9n_M33GXCK_L9p_M34
GXCK_R0n_AK2GXCK_R0p_AK1
GXCK_R10n_K2GXCK_R10p_K1
GXCK_L1p_AH34
GXCK_L2n_AF33GXCK_L2p_AF34
GXCK_L3n_AD33GXCK_L3p_AD34
GXCK_L4n_AB33GXCK_L4p_AB34
GXCK_L5n_Y33GXCK_L5p_Y34
GXCK_L6n_V33GXCK_L6p_V34
GND_Y32
GND_Y4GND_Y6GND_Y8
GXCK_L0n_AK33GXCK_L0p_AK34
GXCK_L10n_K33GXCK_L10p_K34
GXCK_L11n_H33GXCK_L11p_H34
GXCK_L1n_AH33
GND_W28GND_W30GND_W33GND_W34
GND_W5GND_W7
GND_Y27GND_Y29
GND_Y3
GND_Y31
GND_V8GND_W1
GND_W10GND_W12GND_W14GND_W16GND_W18
GND_W2
GND_W20GND_W22GND_W24
GND_V15GND_V17GND_V19GND_V21GND_V23GND_V25
GND_V27
GND_V3
GND_V31GND_V32
GND_V4
GND_U16
GND_U18
GND_U2
GND_U24
GND_U28GND_U33GND_U34
GND_U7
GND_V11GND_V13
GND_T27GND_T29
GND_T3
GND_T31GND_T32
GND_T4GND_T6GND_T8GND_U1
GND_U10GND_U14
GND_R34
GND_R5GND_R7
GND_T11GND_T13GND_T15GND_T17GND_T19GND_T21GND_T23GND_T25
GND_R10GND_R12GND_R18
GND_R2
GND_R20GND_R22GND_R24
GND_R28GND_R30GND_R33
GND_P19GND_P21GND_P23GND_P25
GND_P27
GND_P3
GND_P31GND_P32
GND_P4GND_P8GND_R1
GND_N2
GND_N28GND_N29GND_N33GND_N34
GND_N6GND_N7GND_P10GND_P13GND_P15GND_P17
GND_L34
GND_L5
GND_L8
GND_M3
GND_M31GND_M32
GND_M4GND_M5
GND_M6GND_N1
GND_L1
GND_L10GND_L13GND_L16GND_L19GND_L2GND_L22GND_L25GND_L28
GND_L30GND_L33
GND_H7
GND_J1GND_J2
GND_J30GND_J33GND_J34
GND_J5GND_K3
GND_K31GND_K32
GND_K4
GND_H16GND_H19GND_H22GND_H25GND_H28
GND_H3
GND_H31GND_H32
GND_H4
GND_H5
GND_F31GND_F32
GND_F4GND_G1GND_G2
GND_G30GND_G33GND_G34
GND_G5
GND_H10GND_H13
GND_E10GND_E13GND_E16GND_E19GND_E22GND_E25GND_E28GND_E31
GND_E34
GND_E7GND_F3
GND_B19GND_B22GND_B25GND_B28GND_B31
GND_B33
GND_B4GND_B7GND_D2GND_D4
GND_AN19GND_AN22GND_AN25GND_AN28GND_AN31GND_AN4GND_AN7GND_B1GND_B10GND_B13GND_B16
GND_AK4
GND_AK7
GND_AL1GND_AL2GND_AL3
GND_AL33GND_AL34
GND_AN1
GND_AN10GND_AN13GND_AN16
GND_AK10GND_AK13GND_AK16GND_AK19GND_AK22GND_AK25GND_AK28
GND_AK3
GND_AK31GND_AK32
GND_AG7
GND_AH3
GND_AH31GND_AH32
GND_AH4GND_AJ1GND_AJ2
GND_AJ30GND_AJ33GND_AJ34
GND_AJ5
GND_AG13GND_AG16GND_AG19
GND_AG2
GND_AG22GND_AG25GND_AG28
GND_AG30GND_AG33GND_AG34
GND_AG5
GND_AE30GND_AE33GND_AE34
GND_AE5GND_AF3
GND_AF31GND_AF32
GND_AF4GND_AG1
GND_AG10
GND_AD19GND_AD22GND_AD25GND_AD28
GND_AD3
GND_AD31GND_AD32
GND_AD4
GND_AD7
GND_AE1GND_AE2
GND_AB7GND_AB8GND_AC1GND_AC2
GND_AC30GND_AC33GND_AC34
GND_AC5
GND_AD10GND_AD13GND_AD16
GND_AA9
GND_AB27GND_AB28GND_AB29
GND_AB3
GND_AB30GND_AB31GND_AB32
GND_AB4GND_AB5
GND_AA1
GND_AA11GND_AA13GND_AA16GND_AA19
GND_AA2
GND_AA22GND_AA24
GND_AA26GND_AA33GND_AA34
AS_DATA3_AM33
CONF_DONE_C34
DCLK_AM32
DNU_AD18
DNU_AL32DNU_AM2DNU_AN2
DNU_E33DNU_F33
DNU_K5
DNU_L18
9
VCCorDATA31
7 nCS
18
5AGXFB5_HS40x60mm
FPGA_1
AS_DATA0_AN34AS_DATA1_AN33AS_DATA2_AP33
16
10GND
NC13
4 NC2
5 NC3
NC46 NC5 11
12NC6
13NC7
NC8 14
2 VCC
VCCorDATA2
17
18
1
2
EPCQ256
U612
15ASDIorDATA0
DATA18
DCLK
5
3
5
0
0F_33
25
US56
14
US57
US5
0
2
3
7
6
7
8
19
11
12
11
2
13
6
11
8
9
15
16
10
4
19
9
7
5
16
12
13
8
15
7
8
10
13
20
18
0
US51
9
20
13
F_41
3
4
22
F_10 1K
2
22
14
12
19
cap0402
56pF
1
7
5
3
4
4
11
0
1
15
18
16
6
4
5
1
12
13
F_2122
F_3849
10
0
12
25
15
5
23
21
F_34 0
10KF_40
1
13
14
F_160
13
7
24
30
31
12
JT59
28
62
3
6
19
JT5
23
11
LED5
red
12
20
5
7
0
JT58
2
28
14
19
17
15
6
9
2
19
17
1
15
5
1
3
64
1
cap0603
F_30
0.1uF
15
20
0
18
2
25
F_46
2K
JT53
15
16
8
45
8
1
4
3
13
17
F_45 10K
17
1
13
20
18
1
14
0
240
F_8
0
8
24
3
10
12
4
2
11
9
4
27
11
0
5
9
10
12
11
yellow
LED5
34
17
2
F_39
0
29
1
25
18
16
F_49 space
0
15
26
22
0
10
7
5
2
25
3
27
23
7
26
12
7
12
5
3
16
+3.3V
6
26
22
20
0F_28
4
23
21
13
27
13
4
16
14
1
3
28
5
3
1
1
21
10
6
5
3
24
22
20
18
20
3
20
18
F_47240
5
21
19
US58
15
24
9
10
19
240F_101
15
2KF_43
0
14
10KF_42
JT51
1
3
11
0
1
3
3
22 F_18
21
19
12
4
24
19
17
15
US5
space F_37
F_7240
US5
8
8
0
9
CTRL1
tp2
12
29
F_27 0
1
27
3
24
10KF_20
26
26
11
1 0
0F_36
14
0
1
2
28
3
21
16
12
3
29 28
24
14
4
26
11
5
13
27
7
87
5
F_1422
0
29
2
25
H_GXB_1.5V
LR_GXB_1.15V
T_GXB_1.15V
VAUX_2.5V
VCCP_1.1V
VCC_1.1V
VIO_2.5V
VIO_3.0V
9
2
9
28
17
2
0
29
US5
0
0
14
12
22
3
F_350
16
14
10
8
15
11
27
22 F_11
29 28
2
14
0
22
23
21
9
4
6
1
diff-01_9ADC0in_890, 80
diff-01_8ADC0in_790, 80
diff-01_7ADC0in_690, 80
90, 80diff-01_6ADC0in_5
diff-01_5ADC0in_490, 80
diff-01_4ADC0in_390, 80
diff-01_3ADC0in_290, 80
diff-01_2ADC0in_190, 80
90, 80diff-01_1ADC0in_0
27
diff-01_690, 80
diff-01_590, 80
ADC0in_4nADC0in_3n
diff-01_490, 80
ADC0in_2ndiff-01_3
90, 80ADC0in_1n
diff-01_290, 80
90, 80
ADC0in_0ndiff-01_1
diff-01_14ADCclk090, 80
diff-01_13ADC0in_1290, 80
diff-01_12ADC0in_1190, 80
diff-01_11ADC0in_1090, 80
90, 80diff-01_10ADC0in_9
80, 71ADC1in_1 diff-02_2
80, 71ADC1in_0 diff-02_1
80, 71
ADCclk0n diff-01_1490, 80
ADC0in_12ndiff-01_13
90, 80ADC0in_11n
diff-01_1290, 80
ADC0in_10ndiff-01_11
90, 80
90, 80
ADC0in_9ndiff-01_10
diff-01_9
ADC0in_8n90, 80
ADC0in_7ndiff-01_8
90, 80ADC0in_6n
diff-01_790, 80
ADC0in_5n
ADC1in_12 diff-02_1380, 71
ADC1in_11 diff-02_1280, 71
ADC1in_10 diff-02_1180, 71
ADC1in_9 diff-02_1080, 71
ADC1in_8 diff-02_980, 71
ADC1in_7 diff-02_880, 71
ADC1in_6 diff-02_780, 71
ADC1in_5 diff-02_680, 71
ADC1in_4 diff-02_580, 71
ADC1in_3 diff-02_480, 71
ADC1in_2 diff-02_3
ADC1in_9n80, 71
ADC1in_8ndiff-02_9
80, 71
diff-02_8
ADC1in_7n80, 71
diff-02_7
ADC1in_6n80, 71
diff-02_6
ADC1in_5n80, 71
diff-02_5
ADC1in_4n80, 71
ADC1in_3ndiff-02_4
80, 71
diff-02_3
ADC1in_2n80, 71
diff-02_2
ADC1in_1n80, 71
diff-02_1
ADC1in_0n80, 71
ADCclk1 diff-02_1480, 71
60, 51ADC2in_5 diff-11_6
60, 51ADC2in_4 diff-11_5
60, 51ADC2in_3 diff-11_4
60, 51ADC2in_2 diff-11_3
60, 51ADC2in_1 diff-11_2
60, 51ADC2in_0 diff-11_1
60, 51
diff-02_14ADCclk1n80, 71
diff-02_13
ADC1in_12n80, 71
diff-02_12
ADC1in_11n80, 71
diff-02_11
ADC1in_10n80, 71
diff-02_10
diff-11_3
ADC2in_2n60, 51
diff-11_2
ADC2in_1n60, 51
diff-11_1
ADC2in_0n60, 51
ADCclk2 diff-11_1460, 51
ADC2in_12 diff-11_1360, 51
ADC2in_11 diff-11_1260, 51
ADC2in_10 diff-11_1160, 51
ADC2in_9 diff-11_1060, 51
ADC2in_8 diff-11_960, 51
ADC2in_7 diff-11_860, 51
ADC2in_6 diff-11_7
ADCclk2n60, 51
diff-11_13
ADC2in_12n60, 51
diff-11_12
ADC2in_11n60, 51
diff-11_11
ADC2in_10n60, 51
diff-11_10
ADC2in_9n60, 51
ADC2in_8ndiff-11_9
60, 51
diff-11_8
ADC2in_7n60, 51
diff-11_7
ADC2in_6n60, 51
diff-11_6
ADC2in_5n60, 51
diff-11_5
ADC2in_4n60, 51
ADC2in_3ndiff-11_4
60, 51
60, 51
diff-12_10ADC3in_960, 51
diff-12_9ADC3in_860, 51
diff-12_8ADC3in_760, 51
diff-12_7ADC3in_660, 51
diff-12_6ADC3in_560, 51
diff-12_5ADC3in_460, 51
diff-12_4ADC3in_360, 51
diff-12_3ADC3in_260, 51
diff-12_2ADC3in_160, 51
diff-12_1ADC3in_060, 51
diff-11_14
ADC3in_6ndiff-12_7
60, 51ADC3in_5n
diff-12_660, 51
ADC3in_4ndiff-12_5
60, 51
diff-12_4
ADC3in_3n60, 51
ADC3in_2ndiff-12_3
60, 51ADC3in_1n
diff-12_260, 51
ADC3in_0ndiff-12_1
60, 51
diff-12_14ADCclk360, 51
diff-12_13ADC3in_1260, 51
diff-12_12ADC3in_1160, 51
diff-12_11ADC3in_10
ADC4in_10n60, 51
diff-21_12
ADC4in_11n60, 51
diff-21_14ADCclk4n60, 51
diff-21_13
ADC4in_12n60, 51
ADCclk3n diff-12_1460, 51
ADC3in_12ndiff-12_13
60, 51ADC3in_11n
diff-12_1260, 51
ADC3in_10ndiff-12_11
60, 51ADC3in_9n
diff-12_1060, 51
diff-12_9
ADC3in_8n60, 51
ADC3in_7ndiff-12_8
60, 51
60, 51ADC4in_12 diff-21_13
60, 51
diff-21_2
ADC4in_1n60, 51
diff-21_3
ADC4in_2n60, 51
ADC4in_3ndiff-21_4
60, 51
diff-21_5
ADC4in_4n60, 51
diff-21_6
ADC4in_5n60, 51
diff-21_7
ADC4in_6n60, 51
diff-21_8
ADC4in_7n60, 51
ADC4in_8ndiff-21_9
60, 51
diff-21_10
ADC4in_9n60, 51
diff-21_11
ADC4in_2 diff-21_360, 51
ADC4in_3 diff-21_460, 51
ADC4in_4 diff-21_560, 51
ADC4in_5 diff-21_660, 51
ADC4in_6 diff-21_760, 51
ADC4in_7 diff-21_860, 51
ADC4in_8 diff-21_960, 51
ADC4in_9 diff-21_1060, 51
ADC4in_10 diff-21_1160, 51
ADC4in_11 diff-21_1260, 51
ADCclk4 diff-21_14
ADC5in_670, 61
diff-22_8ADC5in_770, 61
diff-22_9ADC5in_870, 61
diff-22_10ADC5in_970, 61
diff-22_11ADC5in_1070, 61
diff-22_12ADC5in_1170, 61
diff-22_14ADCclk570, 61
diff-22_13ADC5in_1270, 61
ADC4in_0 diff-21_160, 51
diff-21_1
ADC4in_0n60, 51
ADC4in_1 diff-21_260, 51
80, 71
ADC6in_10ndiff-31_11
80, 71
ADC6in_11ndiff-31_12
80, 71
ADCclk6n diff-31_1480, 71
ADC6in_12ndiff-31_13
80, 71
diff-22_1ADC5in_070, 61
diff-22_2ADC5in_170, 61
diff-22_3ADC5in_270, 61
diff-22_4ADC5in_370, 61
diff-22_5ADC5in_470, 61
diff-22_6ADC5in_570, 61
diff-22_7
diff-31_14ADCclk680, 71
diff-31_13ADC6in_1280, 71
ADC6in_1ndiff-31_2
80, 71
ADC6in_2ndiff-31_3
80, 71
diff-31_4
ADC6in_3n80, 71
ADC6in_4ndiff-31_5
80, 71
ADC6in_5ndiff-31_6
80, 71
ADC6in_6ndiff-31_7
80, 71
ADC6in_7ndiff-31_8
80, 71
diff-31_9
ADC6in_8n80, 71
ADC6in_9ndiff-31_10
ADC6in_180, 71
diff-31_3ADC6in_280, 71
diff-31_4ADC6in_380, 71
diff-31_5ADC6in_480, 71
diff-31_6ADC6in_580, 71
diff-31_7ADC6in_680, 71
diff-31_8ADC6in_780, 71
diff-31_9ADC6in_880, 71
diff-31_10ADC6in_980, 71
diff-31_11ADC6in_1080, 71
diff-31_12ADC6in_1180, 71
90, 81
diff-32_7
ADC7in_6n90, 81
diff-32_8
ADC7in_7n90, 81
ADC7in_8ndiff-32_9
90, 81
diff-32_10
ADC7in_9n90, 81
diff-32_11
ADC7in_10n90, 81
diff-32_12
ADC7in_11n90, 81
diff-32_14ADCclk7n90, 81
diff-32_13
ADC7in_12n90, 81
diff-31_1ADC6in_080, 71
ADC6in_0ndiff-31_1
80, 71
diff-31_2
ADC7in_8 diff-32_990, 81
ADC7in_9 diff-32_1090, 81
ADC7in_10 diff-32_1190, 81
ADC7in_11 diff-32_1290, 81
ADCclk7 diff-32_1490, 81
ADC7in_12 diff-32_1390, 81
diff-32_2
ADC7in_1n90, 81
diff-32_3
ADC7in_2n90, 81
ADC7in_3ndiff-32_4
90, 81
diff-32_5
ADC7in_4n90, 81
diff-32_6
ADC7in_5n
GND
GND*
ADC7in_0 diff-32_190, 81
diff-32_1
ADC7in_0n90, 81
ADC7in_1 diff-32_290, 81
ADC7in_2 diff-32_390, 81
ADC7in_3 diff-32_490, 81
ADC7in_4 diff-32_590, 81
ADC7in_5 diff-32_690, 81
ADC7in_6 diff-32_790, 81
ADC7in_7 diff-32_890, 81
GND
GNDGND
VCCT_GXBR0
GND
VCCA_GXBR0
GND
VCCD_FPLL
VCCPD4BCD
2_RXD_14
VCCP
VCC
VCCPD4BCD
ADC5in_8n
VCCPD4BCD
VCCD_FPLLVCCA_FPLL
VCCP
VCC
VCCPD3
VCCP
addr_18
VCC_AUX
VCCPD3
VCCD_FPLL
GND
VCCA_GXBL0
GND
VCCT_GXBL0
GNDGND
GND
GND
GNDGNDGND
VCCT_GXBR0
GND
GNDGND
GND
VCC_AUX
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCCP
GNDGND
GND
VCCT_GXBL0
GNDGNDGND
GND
GND
GNDGND
VCCL_GXBR0VCCL_GXBR0
VCCH_GXBR0
GND
VCCA_FPLL
VCCP
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCCA_FPLL
GND
VCCH_GXBL0
VCCL_GXBL0VCCL_GXBL0
GNDGND
GND
GND
GNDGND
VCCR_GXBRVCCR_GXBR
GND
GNDGND
GND
VCCVCCVCC
GND
VCC
GND
VCC
GND
VCCVCCVCCVCCVCC
GND
VCCP
GNDGND
GND
VCCR_GXBLVCCR_GXBL
GNDGND
GND
GND
GNDGND
VCCT_GXBR1
GND
VCCA_GXBR1
GND
VCCA_FPLL
VCCP
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCC
GND
VCCA_FPLL
GND
VCCA_GXBL1
GND
VCCT_GXBL1
GNDGND
GND
GND
GNDGNDGND
VCCT_GXBR1
GND
GNDGND
GND
VCCPD7BCD
GND
VCCP
VCCVCC
VCCD_FPLLVCCA_FPLL
GND
VCC
GND
VCCP
GND
VCC
GND
VCC
GNDGND
GND
VCCT_GXBL1
GNDGNDGND
GND
GND
GNDGND
VCCL_GXBR1VCCL_GXBR1
VCCH_GXBR1
GND
VCCD_FPLL
GND
vme_data_11
VCC_AUX
GND
VCCPD7BCD
GND
VCCPD7BCD
GND
VCCP
GND
VCCPD8
GND
VCCPD8
GND
VCC_AUX
GND
VCCD_FPLL
GND
VCCH_GXBL1
VCCL_GXBL1VCCL_GXBL1
GNDGND
GND
GND
GNDGND
VCCR_GXBR
GNDGND
VCCPD7AVCCPD7A
ADC2in_7ADC2in_7n
3_TXD_3
3_TXD_4
addr_213_TXD_5
CRC_ERROR_IN
address_26
vme_data_4
address_27
addr_13
address_28
address_29
address_30
addr_23
address_31
VCCPD8VCCPD8
GNDGND
VCCR_GXBL
GNDGND
GNDGND
GND
addr_24
3_TXD_0
VCCPGM
3_TXD_6
3_TXD_7
samplingclockn
vme_data_28
3_TXD_83_TXD_10
addr_2
addr_3
addr_4
addr_7
addr_5
vmewrite
vmeds
vmeas
address_21
address_20
VCCIO8A
GND*
VCCBAT
MSEL3MSEL4
GNDGND
GND
GND
3_TXD_2
VCCIO7A
GND
3_TXD_1
GND
3_TXD_9
samplingclock
GND
3_TXD_14
addr_6
GND
addr_8
GND
ADC1in_10n
addr_12
GND
addr_15
_lword
GND
address_19
address_18
GND
address_9
GNDGNDGND
GNDGND
GNDGND
ADC_SDO_3
ADC_SRESET_3
ADC2in_4nADC2in_4
3_TXD_11
3_TXD_12
3_TXD_13
3_TXD_15
addr_9
addr_22
addr_10
vme_data_7
ADCclk2ADCclk2n
ADC1in_10
addr_14
vme_data_22
addr_17
_iack
transceivers_OE
address_22
address_17
address_11
address_8
MSEL2
GNDGND
GNDGND
GNDGND
ADC_SDO_2
ADC_SRESET_2
ADC2in_11n
VCCIO7B
led_1
led_2
VCCIO7C
vme_data_15
ADC2in_12n
VCCIO7D
vme_data_31
ADC1in_8n
VCCIO8D
ADC1in_0n
vme_data_5
VCCIO8C
vme_data_12
ADC0in_10n
VCCIO8B
_vme_write
address_23
address_16
address_10
VCCIO8A
GNDGNDGND
GNDGND
GNDGND
GND
ADC2in_11
vme_data_19
GND
ADC3in_11n
ADC3in_0n
GND
ADC2in_12
ADC2in_10n
GND
ADC1in_8
ADC1in_0
GND
vme_data_25
vme_data_24
GND
ADC0in_10
ADC0in_9n
GND
address_24
address_15
GNDADCclk0n
MSEL1
GNDGND
GNDGND
GNDGNDGND
ADC_SRESET_1vme_data_10
vme_data_27
ADC3in_2n
ADC3in_11
ADC3in_0
ADC3in_4n
ADC2in_3n
ADC2in_10
ADC2in_9n
ADC1in_2n
2_XCLKvme_data_17
ADC0in_5n
vme_data_29
ADC1in_6n
ADC0in_6n
ADC0in_9
ADC0in_4n
address_25
address_14address_13
ADCclk0
GNDGNDGND
GNDGND
GNDGND
GND
ADC_SDO_1
ADC_SDIO_3
ADC_SRESET_0
vme_data_14
VCCIO7B
ADC3in_2
ADC3in_12n
VCCIO7C
ADC3in_4
ADC2in_3
VCCIO7D
ADC2in_9
ADC1in_2
VCCIO8D
vme_data_18
ADC0in_5
VCCIO8C
ADC1in_6
ADC0in_6
VCCIO8B
ADC0in_4
am_2
VCCIO8A
address_12address_7
VCCIO8A
GNDGND
RREF_F34
GNDGNDGND
ADC_SDO_0
GND
led_0
vme_data_20
GND
ADC3in_12
vme_data_26
GND
ADC2in_1n
vme_data_3
GND
vme_data_6
vme_data_16
GND
ADC0in_11n
ADC1in_3n
GND
am_5
ADC0in_3n
GND
am_1
ADC1in_11n
GND
ADCclk1n
address_5
GND
dir_trans
GND
ADC_SDENB_3
VCCIO7A
GNDGND
VCCIO7A
vme_data_13
ADC3in_3n
vme_data_21
vme_data_0ADC2in_1
vme_data_2
ADC3in_10n
vme_data_1
ADC1in_5nADC1in_5
ADC0in_11
ADC1in_3
ADC0in_7n
am_4
ADC0in_3
am_3
ADC1in_11
ADC1in_4
address_6
ADCclk1
address_4
address_3
address_2
_ds_1
MSEL0
ADC_ENABLE
ADC_SDENB_2
ADC_SDIO_23_XCLK
ADC_SDIO_1
ADC3in_6n
ADC_SYNCIN_1n
VCCIO7D
ADC3in_10
vme_data_23
VCCIO8D
ADC1in_7
addr_11
VCCIO8C
ADC0in_7
ADC0in_2n
VCCIO8B
am_0
ADC0in_0n
VCCIO8A
ADC1in_4n_ga_4
VCCIO8A
_dtack
_ds_0
nCONFIG
CONF_DONE
ADC_SDENB_1
GND
ADC3in_7n
GND
ADC3in_5n
ADC3in_6
ADC2in_6n
ADC2in_0ADC2in_0n
vme_data_8
ADC1in_7n
GND
_berrADC0in_1n
GND
ADC0in_12n
ADC0in_2
GND
ADC0in_0
_ga_1
GND
_ga_2_ga_3
GND
sysclk
GND
nSTATUS
ADC_SDENB_0ADC_SDIO_0
ADC3in_7
ALTERA_CRC_ERROR_OPEN_DRAIN
VCCIO7A
ADC3in_5
ADC2in_2n
ADC2in_6
VCCIO7B
vme_data_30
ADC3in_3
VCCIO7C
vme_data_9
DigIn_1
ADC6in_11
VCCIO3C
ADC6in_2nADC6in_2
VCCIO3B
ADC7in_5nADC7in_5
ADC7in_6nADC7in_6
master_clock1
ADC7in_3
master_clocknmaster_clock
AS_DATA2
GND
QSFP_Control_5
ADC3in_8n
GND
QSFP_Control_4
ADC2in_2
GND
QSFP_Control_6
ADC2in_5n
GND
ADC3in_1n
ADC3in_9n GND
ADC_SYNCIN_1
DigIn_0n
GND
GND
ADC7in_8nADC7in_8
GND
ADC_SCLK_2ADC_SCLK_1
GND
master_clock1n
ADC7in_3n
GND
TCK
AS_DATA1AS_DATA0_ASDO
ADC5in_1n
ADC5in_12nADC5in_12
ADC5in_6ADC5in_6n
3_RXD_23_RXD_1
VCCIO4B
ADC_SYNCIN_7n
ADC_SYNCIN_7
VCCIO4C
ADC_SYNCOUT_3
ADC4in_9
VCCIO4D
2_RXD_1
1_TXD_8
VCCIO3D
ADC7in_0
VCCIO3A
0_XCLK
0_RXD_6
0_RXD_12
0_RXD_14
DCLK
AS_DATA3nCSO_DATA4
GND
ADC5in_1
GND
ADC5in_7
3_RXD_12
GND
ADC_SYNCIN_6ADC_SYNCIN_6n
GND
ADC4in_8
ADC_SYNCOUT_3n
GND
ADC4in_9n
2_RXD_2
GND1_TXD_7
DigIn_1n
GND
ADC6in_11n
ADC6in_3
ADC7in_1
0_RXD_5
0_RXD_7
0_RXD_13
0_RXD_15
GNDGND
RREF
3_RXD_143_RXD_13
ADC5in_7n
3_RXD_11ADC5in_0
ADC4in_11
VCCIO4B
2_TXD_8
ADC4in_8n
VCCIO4C
ADC4in_12
ADC5in_2
VCCIO4D
ADC5in_11
1_TXD_6
VCCIO3D
ADC_SYNCIN_5
ADC7in_12
VCCIO3C
ADC6in_3n
0_TXD_1
VCCIO3B
ADC7in_4
ADC7in_7
VCCIO3A
GNDGND
GNDGND
GNDGNDGND
ADC4in_4nADC4in_4
3_RXD_15
ADC5in_0n
ADC4in_11n
2_TXD_13
2_TXD_7
2_TXD_1
ADC4in_10
ADC4in_12n
ADC5in_2n
ADC5in_10
ADC5in_11n
1_TXD_5
ADC_SYNCIN_4
ADC_SYNCIN_5n
ADC7in_12n
ADC6in_5nADC6in_5
0_TXD_2
0_TXD_8
ADC7in_4n
ADC7in_0n
ADC7in_7n
GNDGNDGND
QSFP_Rx0_3QSFP_Rx0_3n
GNDGND
VCCIO4A
addr_16
GND
ADC4in_7
2_TXD_12
GND
addr_19
ADC4in_10n
GND
2_RXD_12
ADC5in_10n
GND
ADC_SYNCIN_0
ADC_SYNCIN_4n
GND
1_RXD_5
ADC6in_1
GND
ADC_SCLK_3ADC6in_7
GND
ADC7in_10
ADC7in_1n
GND
GNDGND
GNDGND
GNDGND
QSFP_Tx0_3QSFP_Tx0_3n
GND
3_RXD_10
ADCclk4
ADC4in_7n
VCCIO4B
ADC4in_0
ADC_SYNCOUT_0
VCCIO4C
ADC4in_2
addr_20
VCCIO4D
ADC5in_3
ADC_SYNCIN_0n
VCCIO3D
1_TXD_13
1_RXD_6
VCCIO3C
ADC6in_1n
ADC6in_10
VCCIO3B
ADC6in_7n
ADC7in_10n
VCCIO3A
ADC7in_11
GNDGND
GNDGND
GNDGND
VCCIO4A
3_RXD_9
ADCclk4n
ADC_SYNCIN_3
ADC_SYNCIN_2
ADC4in_0n
ADC_SYNCOUT_0nADC4in_6
ADC4in_2n
2_RXD_11
ADC5in_9
ADC5in_3n
0_RX_CLK
3_RX_CLK
1_TXD_14
ADC6in_9
ADC6in_6nADC6in_6
ADC6in_10n
ADC6in_8nADC6in_8
0_TXD_14
ADC7in_2
ADC7in_11n
0_RXD_8
VCCIO3A
GNDGND
GNDGND
GNDGNDGND
ADCclk5
GND
ADC_SYNCIN_3n
ADC_SYNCIN_2n
GND
ADC4in_1
ADC4in_6n
GND
2_RXD_10
ADC5in_9n
GND
2_RX_CLK
1_RX_CLK
GND
ADC6in_9n
1_RXD_7
GND
ADC6in_4
0_TXD_9
GND
0_TXD_15
ADC7in_2n
GND
1_XCLK
GND
GNDGND
QSFP_Rx0_0QSFP_Rx0_0n
GNDGND
VCCIO4A
ADCclk5n
3_RXD_5
3_RXD_0
VCCIO4B
2_TXD_6
ADC4in_1n
VCCIO4C
ADC4in_5
ADC5in_5
VCCIO4D
2_RXD_7
ADCclk7
VCCIO3D
2_RXD_0
ADC6in_12
VCCIO3C
1_TXD_12
ADC6in_4n
VCCIO3B
0_TXD_11
1_RXD_13
VCCIO3A
0_RXD_0
0_RXD_9
TMS
GNDGND
GNDGND
QSFP_Tx0_0QSFP_Tx0_0n
GND
3_RXD_8
3_RXD_4
addr_26
2_TXD_11
2_TXD_5
2_TXD_0
ADC4in_3
ADC4in_5n
ADC5in_5n2_RXD_6
1_TXD_11
ADCclk7n
ADCclk6
1_RXD_0
ADC6in_12n
1_RXD_81_RXD_14
0_TXD_30_TXD_10
ADC6in_0
0_RXD_1
clkswitch
0_RXD_4
0_RXD_10
GND
GND
QSFP_Rx0_2QSFP_Rx0_2n
GNDGND
VCCIO4A
3_RXD_7
GND
2_TXD_15
2_TXD_10
GND
2_RXD_15
ADC4in_3n
GND
ADC5in_4
2_RXD_5
GND
ADCclk6n
GND
1_TXD_15
1_RXD_9
GND
0_TXD_4
ADC6in_0n
GND
0_RXD_20_RXD_3
GND
0_RXD_11
VCCIO3A
GNDGND
GND
GNDGND
QSFP_Tx0_2QSFP_Tx0_2n
GND
3_RXD_63_RXD_3
2_TXD_14
2_TXD_92_TXD_4
ADC_SYNCOUT_1nADC_SYNCOUT_1
DigOutput
ADC5in_4n2_RXD_4
1_TXD_10
1_TXD_41_TXD_1
1_RXD_1
addr_25
1_RXD_10
1_RXD_15
0_TXD_5
ADC7in_9nADC7in_9
VCCPGM
VCCPD3
TDO
TDI
GNDGND
GNDGNDGND
VCCPD4A
GNDGND
VCCPD4A
2_TXD_3
ADC_SYNCOUT_2nADC_SYNCOUT_2
DigOutputn
2_RXD_9
2_RXD_3
1_TXD_9
1_TXD_3
clkswitchcontrol
1_RXD_2
1_RXD_3
1_RXD_11
0_TXD_0
0_TXD_6
ADC_SCLK_0
0_TXD_12
VCCPD3
GNDGNDGNDGNDGNDGND
GND
QSFP_Tx0_1QSFP_Tx0_1n
VCCR_GXBRVCCR_GXBR
gx_pll_refclkin1ngx_pll_refclkin1
GND
2_TXD_2
GND
2_RXD_13
GND
2_RXD_8
ADC5in_8
GND
1_TXD_2
1_TXD_0
GND
1_RXD_4
1_RXD_12
GND
0_TXD_7
GND
0_TXD_13
GND
GNDGND
VCCR_GXBLVCCR_GXBL
GNDGND
QSFP_Rx0_1QSFP_Rx0_1n
QSFP_Control_2
ADC2in_8nADC2in_8
QSFP_Control_3
VCCIO7B
ADC2in_5
ADC3in_1
VCCIO7C
ADC3in_9
DigIn_0
VCCIO7D
ADCclk3ADCclk3n
VCCIO8D
ADC1in_9ADC1in_9n
VCCIO8C
ADC0in_1
ADC0in_12
VCCIO8B
ADC0in_8nADC0in_8
_ga_0
ADC1in_12nADC1in_12
ADC1in_1nADC1in_1
_as
nCE
GNDGND
HS
addr_2addr_3addr_4addr_5addr_6addr_7addr_8addr_9addr_10addr_11addr_12addr_13addr_14addr_15addr_16addr_17addr_18addr_19addr_20addr_21addr_22addr_23addr_24addr_25addr_26vmeasvmedsvmewrite
QSFP_Control_0
ADC3in_8
QSFP_Control_1
VCCA_GXBL1VCCA_FPLLVCCH_GXBR1VCCH_GXBR0VCCH_GXBL1VCCH_GXBL0VCCD_FPLLVCCBATVCCIO8B
VCCIO8CVCCIO8DVCCPD8
CRC_ERROR_INALTERA_CRC_ERROR_OPEN_DRAIN
VIO_2.5V
master_clock1mcHS
master_clock1nmcHS
df_15 gx_pll_refclkin1HS
df_15 gx_pll_refclkin1n
VCCIO3AVCCIO3BVCCIO3CVCCIO3DVCCIO4AVCCIO4BVCCIO4CVCCIO4DVCCIO7AVCCIO7BVCCIO7CVCCIO7DVCCPD3VCCPD4AVCCPD4BCDVCCPD7AVCCPD7BCDVCCIO8A
VCCL_GXBR0VCCL_GXBR1VCCL_GXBL0VCCL_GXBL1VCCR_GXBRVCCR_GXBLVCCT_GXBR0VCCT_GXBR1VCCT_GXBL0VCCT_GXBL1VCC_AUXVCCA_GXBR0VCCA_GXBR1VCCA_GXBL0
df_19 HS
ADC_CLK3ndf_19 HS
VCCIO8A
VIO_2.5V
VCCVCCPVCCPGM
ADC_CLK1df_3
ADC_CLK1ndf_3
ADC_CLK2df_5
ADC_CLK2ndf_5
ADC_CLK3df_7
ADC_CLK3ndf_7
ADC_CLK0df_16 HS
ADC_CLK0ndf_16 HS
ADC_CLK1df_17 HS
ADC_CLK1ndf_17 HS
ADC_CLK2df_18 HS
ADC_CLK2ndf_18 HS
ADC_CLK3
diff-31_15ADC_SYNCIN_6n ADC_SYNCIN_6 diff-31_15
3_ADC_CTRL(5:0)
ADC_SRESET_3
ADC_SCLK_3
ADC_SDENB_3
ADC_ENABLE
ADC_SDIO_3
ADC_SDO_3
3_ADC_SYNC(1:0)
ADC_SYNCOUT_3df_6
ADC_SYNCOUT_3ndf_6
3_ADC_CLK(1:0)
3_ADC_2_OUT[29:0]
ADC_SYNCIN_7n diff-32_15 diff-32_15ADC_SYNCIN_7
clkswitchcontrolclkswitch
VCCIO8A
diff-22_9
ADC5in_8n70, 61
ADC5in_7ndiff-22_8
70, 61ADC5in_6n
diff-22_770, 61
ADC5in_5ndiff-22_6
70, 61ADC5in_4n
diff-22_570, 61
diff-22_4
ADC5in_3n70, 61
ADC5in_2ndiff-22_3
70, 61ADC5in_1n
diff-22_270, 61
ADC5in_0ndiff-22_1
70, 61
diff-22_15ADC_SYNCIN_5n ADC_SYNCIN_5 diff-22_15
3_ADC_1_OUT[29:0]
diff-21_15 diff-21_15ADC_SYNCIN_4
2_ADC_CTRL(5:0)
ADC_SRESET_2
ADC_SCLK_2
ADC_SDENB_2
ADC_ENABLE
ADC_SDIO_2
ADC_SDO_2
2_ADC_SYNC(1:0)
ADC_SYNCOUT_2df_4
ADC_SYNCOUT_2ndf_42_ADC_CLK(1:0)
2_ADC_2_OUT[29:0]
ADC5in_12ndiff-22_13
70, 61
ADCclk5n diff-22_1470, 61
ADC5in_11ndiff-22_12
70, 61ADC5in_10n
diff-22_1170, 61
ADC5in_9ndiff-22_10
70, 61
ADC_CLK0ndf_1
0_ADC_2_OUT[29:0]
diff-02_15ADC_SYNCIN_1ADC_SYNCIN_1n diff-02_15
1_ADC_1_OUT[29:0]
diff-11_15ADC_SYNCIN_2ADC_SYNCIN_2n diff-11_15
1_ADC_CTRL(5:0)
ADC_SRESET_1
ADC_SCLK_1
ADC_SDENB_1
ADC_ENABLE
ADC_SDIO_1
ADC_SDO_1
1_ADC_SYNC(1:0)
ADC_SYNCOUT_1df_2
ADC_SYNCOUT_1ndf_21_ADC_CLK(1:0)
1_ADC_2_OUT[29:0]
ADC_SYNCIN_3 diff-12_15diff-12_15ADC_SYNCIN_3n
2_ADC_1_OUT[29:0]
ADC_SYNCIN_4n
3_RXD_13_RXD_23_RXD_33_RXD_4
3_RXD_11
3_RXD_15
3_RXD_5
3_RXD_133_RXD_12
3_RX_CLK
3_XCLK
ADC_SYNCIN_0 diff-01_15diff-01_15ADC_SYNCIN_0n
0_ADC_CTRL(5:0)
ADC_SRESET_0
ADC_SCLK_0
ADC_SDENB_0
ADC_ENABLE
ADC_SDIO_0
ADC_SDO_0
0_ADC_SYNC(1:0)
ADC_SYNCOUT_0df_0
ADC_SYNCOUT_0ndf_00_ADC_CLK(1:0)
ADC_CLK0df_1
3_TXD_43_TXD_53_TXD_63_TXD_73_TXD_83_TXD_93_TXD_103_TXD_113_TXD_123_TXD_133_TXD_143_TXD_15
3_RXD[15:0]
3_RXD_63_RXD_73_RXD_83_RXD_93_RXD_10
3_RXD_14
3_RXD_0
2_TXD_15
2_RXD[15:0]
2_RX_CLK
2_XCLK
2_RXD_02_RXD_12_RXD_22_RXD_32_RXD_42_RXD_52_RXD_62_RXD_72_RXD_82_RXD_92_RXD_102_RXD_112_RXD_122_RXD_132_RXD_142_RXD_15
3_TXD(15:0)
3_TXD_03_TXD_13_TXD_23_TXD_3
1_XCLK
2_TXD(15:0)
2_TXD_02_TXD_12_TXD_22_TXD_32_TXD_42_TXD_52_TXD_62_TXD_72_TXD_82_TXD_92_TXD_102_TXD_112_TXD_122_TXD_132_TXD_14
1_TXD_101_TXD_111_TXD_121_TXD_131_TXD_141_TXD_15
1_RXD[15:0]
1_RXD_61_RXD_71_RXD_81_RXD_91_RXD_10
1_RXD_14
1_RXD_01_RXD_11_RXD_21_RXD_31_RXD_4
1_RXD_11
1_RXD_15
1_RXD_5
1_RXD_131_RXD_12
1_RX_CLK
0_RXD_50_RXD_60_RXD_70_RXD_80_RXD_90_RXD_100_RXD_110_RXD_120_RXD_130_RXD_140_RXD_15
1_TXD(15:0)
1_TXD_01_TXD_11_TXD_21_TXD_31_TXD_41_TXD_51_TXD_61_TXD_71_TXD_81_TXD_9
address_27address_28address_29address_30address_31
0_ADC_1_OUT[29:0]
samplingclock
samplingclockn
DigIO(15:0)
DigIn_0df_11HS
DigIn_1df_12HS
DigOutputdf_13HS
DigIn_0ndf_11HS
DigIn_1ndf_12HS
DigOutputndf_13HS
0_RXD_00_RXD_10_RXD_20_RXD_30_RXD_4
_ga_2_ga_3_ga_4
_iack
am_2
am_5
am_0
address_2address_3address_4address_5address_6address_7address_8address_9address_10address_11address_12address_13address_14address_15address_16address_17address_18address_19address_20address_21address_22address_23address_24address_25address_26
0_TXD_110_TXD_120_TXD_130_TXD_140_TXD_15
LocalVMEaux[31:0]
0_RXD[15:0]
0_RX_CLK
0_XCLK
VME_Addr(31:2)VME_ETC(30:0)
_as
sysclk_ds_1_lword_ds_0_vme_write
am_4
_berr
am_3
am_1
_dtack
_ga_0_ga_1
VCCPGM
VCCPGM
DCLKTTL
0_TXD(15:0)
0_TXD_00_TXD_10_TXD_20_TXD_30_TXD_40_TXD_50_TXD_60_TXD_70_TXD_80_TXD_90_TXD_10
AS_DATA0_ASDO
TTL
AS_DATA1nCSO_DATA4
TTL
TTLAS_DATA3
VCCPGM
AS_DATA2TTL
RREF_F34
TDI
TCKTDOTMS
VCCPGM
VCCPGM
QSFP_Rx[7:0]
I1_12 QSFP_Rx0_0
I1_13 QSFP_Rx0_1
I1_14 QSFP_Rx0_2I1_14 QSFP_Rx0_2n
I1_15 QSFP_Rx0_3
transceivers_OE
VIO_2.5V
VIO_3.0V
I1_15 QSFP_Rx0_3n
I1_13 QSFP_Rx0_1n
I1_12 QSFP_Rx0_0n
I1_11 QSFP_Tx0_3n
I1_10 QSFP_Tx0_2n
QSFP_Tx0_1nI1_9
I1_8 QSFP_Tx0_0n
TTL
MSEL3VCCPGM
VCCPGMVCCPGM
VCCPGMVCCPGMVCCPGM
VIO_3.0V
VCCP_1.1V
VCC_1.1V
LR_GXB_1.15V
T_GXB_1.15V
H_GXB_1.5V
VAUX_2.5V
QSFP_Tx[7:0]
I1_8 QSFP_Tx0_0
I1_9 QSFP_Tx0_1
I1_10 QSFP_Tx0_2
I1_11 QSFP_Tx0_3
LR_GXB_1.15V
T_GXB_1.15V
VCC_1.1V
VAUX_2.5V
QSFP_Control[6:0]
QSFP_Control_0QSFP_Control_1QSFP_Control_2QSFP_Control_3QSFP_Control_4QSFP_Control_5QSFP_Control_6
master_clockdf_14HS
master_clockndf_14HS
MSEL4
vme_data_20vme_data_21vme_data_22vme_data_23vme_data_24vme_data_25vme_data_26vme_data_27vme_data_28vme_data_29vme_data_30vme_data_31
dir_trans
H_GXB_1.5V
RREF
VCCP_1.1V
GND
GND
nCSO_DATA4
CONF_DONEDCLK
nCONFIGAS_DATA1
AS_DATA0_ASDO
VME_Data[31:0]
vme_data_0vme_data_1vme_data_2
nCE
vme_data_3vme_data_4vme_data_5vme_data_6vme_data_7vme_data_8vme_data_9vme_data_10vme_data_11vme_data_12vme_data_13vme_data_14vme_data_15vme_data_16vme_data_17vme_data_18vme_data_19
led_1
led_0
led_2
+3.3V
GND
GND
nCE
MSEL2
MSEL0
MSEL1
nSTATUS
CONF_DONE
nCONFIG
