A.M. Fernandes1, R.C. Pereira1, J. Sousa1, A.J.N. Batista1, A. Combo1, B.B. Carvalho1, C.M.B.A. Correia2, C.A.F. Varandas1

1 Associação EURATOM/IST, Instituto de Plasmas e Fusão Nuclear – Laboratório Associado, Instituto Superior Técnico, P-1049-001 Lisboa, Portugal

e-mail: anaf@ipfn.ist.utl.pt

2 Grupo de Electrónica e Instrumentação – Centro de Instrumentação, Dept. de Física, Universidade de Coimbra, 3004-516 Coimbra, Portugal

Keywords: FPGA, Reconfigurable Hardware, Real

Time Processing, Data Acquisition, ATCA.

The reconfigurability of FPGA based modules enablesexploiting several applications on the same module,performed by different users. Being available acommon interface library for easier implementation ofthe algorithms on the FPGA leads to more efficientdevelopment. The common interface library shouldinclude the paths and tasks that require deepknowledge of the module behavior, freeing theapplication designer from hardware complexity andable to choose any of the available abstractionlanguages for the algorithm implementation.

Basic functional blocks

Library blocks - automatic insertion.Parameters choice / channels placement:

a) 14 bits selection;b) 13 bits selection.

The Transient Recorder and Processor (TRP) module is provided with a modular library including

front end interfaces for algorithms [1].

Triggering modes and clocks management (CTTS); PLL programming; Interface with local memory; Gigabit communication through PCIe links;Data path - from input channels to local memory;

- from local memory to the host.

Additional blocksPCIe communication through SFP to another PC;Signal filtering with FIR.

Ad d bl k D t R d ti / P i

The code library contains all the functional hardwaredescription and the front end interfaces to be used inmultipurpose applications;The library enables different algorithm developers tobuild its own code for the TRP module, in one of theavailable descriptive languages, without the need of anyknowledge about hardware complexities;The real time hardware processing is required in severalapplications;

Main library blocks @ FPGA .Scheme used in Gamma Spectroscopy [2].

Advanced blocks - Data Reduction / ProcessingEvent storage block; Real time processing:

i) Processing block interface;ii) Parallel processing block interface.

[1] R.C. Pereira, J.Sousa, A.M. Fernandes, F. Patrício, B. Carvalho,A.Neto, C.A.F. Varandas, G. Gorini, M. Tardocchi, D.Gin, A.S “ C f

applications;The library may be used in other reconfigurablemodules, when applicable;The interface library may be improved with newfeatures, namely when desired by algorithm developers.

Shevelev, “ATCA data acquisition system for gamma rayspectrometry”, Journal of Fusion Engineering and Design, vol. 83,pp 341–345, 2008.

[2] R.C. Pereira, A.M. Fernandes, J. Sousa, J. Cardoso, C.M.B.A.Correia, M. Tardocchi, M. Nocente, G. Gorini, V. Kiptily, B. Syme,M. Jennison and JET-EFDA contributors, “Pulse analysis forgamma-ray diagnostics ATCA sub-systems of JET tokamak”, IEEETrans. Nucl. Sci., submitted.

[3] A.M. Fernandes, R.C. Pereira, J. Sousa, A. Neto, P. Carvalho,A.J.N. Batista, B.B. Carvalho, C.A.F. Varandas, M. Tardocchi, G.Gorini and JET EFDA contributors, “Parallel Processing Method forHigh Speed Real Time Digital Pulse Processing for Gamma-RayS f

Acknowledgments: This work has been carried out within theframework of the Contract of Association between the European AtomicEnergy Community and "Instituto Superior Técnico" (IST). IST alsoreceived financial support from "Fundação para a Ciência e Tecnologia"in the frame of the Contract of Associated Laboratory. The views andopinions expressed herein do not necessarily reflect those of theEuropean Commission.

Spectroscopy”, Journal of Fusion Engineering and Design, inpress.

PHA with PUR in agreement with Parallel Processing Block Interface [3].