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Single-Crystal Statistical Field-Effect Transistors

Pramod Kumar , Yulia Gerchikov , Kammasandra Nanajunda Shivananda , Anat Sadeh , Yoav Eichen , and Nir Tessler*

Dr. P. Kumar, A. Sadeh, Prof. N. Tessler Nanoelectronics Center, Department of Electrical Engineering Technion – Israel Institute of Technology Technion City, 32000 Haifa , Israel E-mail: nir@ee.technion.ac.il Y. Gerchikov, Dr. K. N. Shivananda, Prof. Y. Eichen Schulich Faculty of Chemistry Technion – Israel Institute of Technology Technion City, 32000 Haifa , Israel

DOI: 10.1002/aelm.201500309

highly specialized ink-jet printer that can print 1 μm dots with excellent alignment; [ 10 ] however, to contact single crystals that are randomly oriented would require too com-plex mapping and aligning methods. This complexity, in fi nding a suitable method to use single crystals in a simple fabrication process, is probably part of the reason that there is very little synthetic effort devoted to fi nding better crystal-forming molecular structures, not to mention their implemen-tation in devices through a printing process.

Here, we propose to arrive at high-performance materials by making the crystal-forming molecules relevant through the use of a dedicated transistor architec-ture that is designed to accommodate the

features of the crystal-forming organic materials. In ref. [ 11 ] the authors developed a method for contacting nanowires that is based on forming highly dense and aligned nanowires such that the deposition of the contacts did not need to be aligned to a single nanowire. However, aligning the nanowires was a must and to capture nanowires between source and drain electrodes it was required to maintain few microns resolution, which was achieved through photolithography. Here we report a transistor architecture where the fabrication of the source and drain con-tacts and the contacting of the crystals are implemented sepa-rately. This introduces another degree of freedom in the device design which can be used to easily accommodate organic crys-tals in an FET structure. After discussing the new transistor structure and its mode of operation we demonstrate its high performance. We fi rst demonstrate a P-type transistor having a 100 μm channel length which is based on multiple, primarily isolated and randomly oriented, single crystals having the size of ≈10 μm. We fi nd that the transistors’ effective mobility is at least 50% of that found for a single crystal. We then move to showing the generality of the structure by demonstrating also N-type and varying crystallites morphologies.

2. Results and Discussion

2.1. The Statistical FET

The concept of the statistical FET (SFET) structure is shown in Figure 1 a–c, which also illustrates the specifi c implementation process adapted here. Figure 1 a shows a top view of the gate and gate dielectric onto which many crystallites were deposited at a number density such that they form a discontinuous polycrys-talline layer. Figure 1 b shows the source and drain deposited atop the crystalline layer, forming what could be called bottom

Field-effect transistors (FET) are largely based on single crystals, amorphous fi lms, or multiple (poly)crystalline layers. The single crystal that is known to exhibit the best performance in terms of mobility and stability is in fact only scarcely used in organic electronics, let alone in the context of low-cost printing. Here a new FET design is presented, the statistical FET (SFET), which through a single additive step, requiring no alignment of the crystals with respect to the electrodes, can overcome the limitations imposed by the standard FET structure. This enables the use of crystal forming molecules in an additive manufacturing process, as printing is. This extra additive step can be utilized in passivating grain boundary related traps or dedoping. Several SFET onfi gutrations are using several crystal forming molecules. This new structure may shift the synthetic effort toward crystal-forming molecules.

1. Introduction

The technology of fi eld-effect transistors (FETs) is best known as the silicon single-crystal-based circuits and chips where mil-lions of FETs are built into a large single crystal wafer. In the case of organic materials it seems to be impossible to arrive at such large-area crystals and hence by single-crystal organic FET one would mean that there is one crystal that extends all the way across a single FET (as opposed to across the wafer in the case of silicon). [ 1–3 ] There are reports of single-crystal transistors but in the context of organic semiconductors, the crystallites are often too small to be addressed individually using low-resolution fab-rication methods. This has led to some efforts [ 4–7 ] aimed at posi-tioning the crystallites at the precise place within the channel area and often it implies that the channel length should be kept at or below 10 μm. [ 4 ] While there are reports [ 8,9 ] where through prepatterning the wetting properties of the substrates one can print poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT) to achieve a below-10 μm channel such methods do not lend themselves easily to contacting crystals and the prepat-terning is not always a desired step. There are also reports of

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gate top electrode transistor structure. Since the polycrystalline layer is discontinuous there is no electrical path between the electrodes and hence this device cannot function as a tran-sistor. Figure 1 c shows that with one additive step that deposits conducting round disks, over the entire area, the crystallites become inter connected. In fact, the new device is now being composed of many transistors interconnected in series and in parallel. The odds that a given crystallite is being contacted on both sides and the number of crystallites connecting two con-ducting circles are a statistical issue and hence the name of this structure: SFET. This statistics would of course be dependent on the average size and number density of the crystallites as well as on the pattern used to contact the crystallites. However, due to the relatively large number of transistors being con-tacted in parallel and in series once a process is chosen the sta-tistics remains unchanged between transistors and so is their performance. While Figure 1 a–c illustrates the specifi c imple-mentation process adapted here, however, it is the concept of separating the source and drain fabrication from the process that provides contacts to the single crystals which is important. For example, one could start by using a prepatterned substrate, having predefi ned arrays of conducting islands, using methods already developed in the context of touchscreens. [ 12 ] This will be followed by the deposition of the crystals and fi nally the cir-cuit functionality of source–drain, top gate, and interconnects would be deposited using a low-resolution printing method.

Figure 1 d shows schematically a side view of the SFET illus-trating how the conducting circles form the continuous path between the two electrodes. Figure 1 e displays a top view photo-graph of such SFET showing mainly the interpenetrating source and drain electrodes. One could note that across the entire fi eld of view there is a pattern of circular conducting shapes that was deposited without any alignment whatsoever. Figure 1 f is a zoom into the channel taken with a scanning electron microscope

(SEM). We note the circular shapes, which form the conducting pattern, and across them there are darker elongated shapes (the crystallites) that are being contacted by the circular conducting pattern. Additional SEM pictures and cross sections as well as details of the stencil mask used to deposit the conducting cir-cles can be found in the Supporting Information (Figures S1–S4, Supporting Information). The above structure may seem similar to the early report in ref. [ 13 ] ; however, the formation of metallic islands in ref. [ 13 ] was based on dewetting of very thin metal fi lms where the requirement to achieve discontinuous metal results in low quality islands. In fact, we found that methods based on self-assembly where one needs to stay below percolation threshold do not produce good enough performance.

To examine the operation of the SFET structure in affecting the apparent material properties we have performed 2D simula-tions [ 14,15 ] of such a structure. The top of Figure 2 a shows the sche-matic of the structure being simulated. It shows the gate insulator on top of which there are fi ve crystals where the two outmost are contacted by source (S) and drain (D) electrodes. Also shown are four conducting islands that connect the crystals and complete the SFET structure. Figure 2 a shows the simulated charge density profi le at the transistor channel (insulator interface). The full line shows the charge density of the SFET considered and the dashed line is a result of the simulation of a standard FET assuming it contains one large crystal extending all the way from source to drain, with no conducting islands. For the SFET data, the narrow regions exhibiting “infi nite” charge density are where the con-ducting islands touch the insulator. As the charge density in the conducting material is very high it appears as infi nite here. Note that where the conductor covers the crystal the charge density at the channel is constant to refl ect the equipotential induced by the conductor. Comparing the full to the dashed line we note that the metallic islands act to short parts of the channel making an effec-tively shorter channel. Figure 2 b shows the 2D distribution of the

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Figure 1. a–c) SFET fabrication steps. a) Schematic top view of gate covered by gate dielectric onto which crystallites were randomly grown. b) The same top view but with source and drain deposited on top. c) Schematic top view of the SFET which is formed following an additive step of depositing round conducting patterns. d) Schematic side view of the SFET. e) Picture, top view, of the SFET showing the interpenetrating source/drain gold elec-trodes along with the conducting pattern that was deposited across. f) SEM image zooming on one region and showing the crystallites (dark shapes) are being contacted by the round conductors.

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charge density across the entire fi lm. The four conducting islands are again marked by their high charge density and the channel is shown as a thin sheet close to zero (insulator interface).

To better illustrate the effect of channel shortening we show in Figure 2 c the 2D distribution of the current fl owing parallel to the insulator, between the source and drain electrodes. In regions where there is no conductor, the current is indeed con-fi ned to the channel and exhibits a high density. In the regions covered by the conducting pattern the current fl ows through the conductor and its density scales with the cross section occu-pied by the conductor at each cross section along the imaginary line connecting the source and drain. Namely, the effect of the pattern is to create a transistor, the length of which is the sum of gaps between the conductors and its performance is similar to a continuous single crystal of that, short, length.

2.2. Experimental Results

To demonstrate the organic SFET (OSFET) we made use of both p-type, P1 , and n-type, N1 , crystal forming molecules,

the chemical structures of which are presented in Figure 3 a,b, respectively. OSFET data obtained using the C60 molecule can be found in Supporting Information Figures S5 and S6. The advantage of the P1 and N1 molecules for the current study is that the fi lm morphology and/or the number density of crystals can be tuned through the processing conditions thus allowing to self-consistently probe the new transistor structure across several material morphologies. Details on P1 and the depend-ence of its fi lm morphology on the processing conditions can be found elsewhere. [ 16 ] Somewhat similar behavior was found for N1 but this will not be detailed here.

Atomic force microscope (AFM) images depicted in Figure 3 c,d and e,f are of crystallites of P1 and N1 , respectively. Figure 3 c,e shows images of fi lms that are formed after spin-coating onto silicon oxide slides with 0.5 mg mL −1 and 2 mg mL −1 THF solutions of P1 and N1 , respectively. Figure 3 d,f shows similar images but of fi lms prepared using higher con-centration solutions of 1 mg mL −1 and 4 mg mL −1 , respectively. The different fi lm morphologies are evident in these sub fi g-ures. Both molecules show randomly oriented crystals but those of P1 are mostly isolated with varying sizes (2–25 μm)

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Figure 2. Results of a 2D drift-diffusion-Poisson simulation of a structure of the type shown in Figure 1 d and for V GS = V DS = 10 V. a) The charge density at the channel (insulator interface). Top: Schematic layout of the crystals and the conducting pattern to allow for better orientation. The parts where the density goes to “infi nity” are where the conductor is touching the insulator interface and the parts where the charge density is constant are where the conductor is covering the crystal. b) 2D charge density distributions. The view is from the gate insulator toward the top surface showing fi rst the charge density profi le at the channel and behind the structure of the metal islands is marked by the high charge density. c) 2D distribution of the current fl owing parallel to the fi lm between source and drain. Note that the current fl ows in the channel only in regions that are not covered by metal, where it fl ows through the metal.

Figure 3. Molecules and AFM images of developed random distribution of single crystals on SiO 2 substrates. Structures of a) P1 and b) N1 molecules. 100 × 100 μm AFM images of P1 single crystals developed by fi rst spin coating c) 0.5 mg mL −1 and d) 1 mg mL −1 solution in THF on SiO 2 substrates and then annealing at 150 °C. 100 × 100 μm AFM images of N1 single crystals developed by fi rst spin coating e) 2 mg mL −1 and f) 4 mg mL −1 solution in THF and then annealing at 120 °C. The inset to (f) shows optical image of n-type single crystals developed on OTS-treated SiO 2 substrate.

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while those of N1 tend to be mostly connected and rather thin. In both cases, the number density of crystals goes up with the solution concentration. There is rich chemical physics in con-trolling the crystalline structure through surface interactions but this is not the topic of this paper. We only show that coating the silicon oxide surface with octadecyltrichlorosilane (OTS) promoted a morphology for N1 that is closer to that of the fi lms of P1 (see the inset to Figure 3 f).

The fabrication of SFETs was carried out following three simple steps: 1) Fabrication of randomly distributed crystallite on substrate by annealing the spin-coated fi lms at temperatures close to their melting point. 2) Evaporation of gold source and drain contacts using commercially available metal stencil mask having dimensions larger than the crystal sizes ( L = 100 μm, W = 19800 μm). 3) Evaporation of gold through the silicon stencil mask to create the circular gold pattern over the entire area of the interdigitated source–drain electrodes. The top view picture of the transistor is shown in Figure 1 e and SEM image of the interconnected crystals is shown in Figure 1 f (other images and cross sections can be found in the Supporting Information).

Figure 4 a,b shows output and transfer characteristics of the P1 SFET, respectively. Prior to the deposition of the circular pat-tern, the transistors showed negligible, if at all, current. Each measured curve is a double scan in both directions showing negligible hysteresis and the threshold voltage found is very close to zero (Figure 4 b). As explained above, the stencil mask pattern interconnects the randomly distributed single crys-tals, thus the source–drain current ( I DS ) would depend on the mobility of the single crystals and on the number of complete paths from source to drain. As the circular pattern is made of gold it forms close to ohmic contacts with the P1 crystallites

and hence the crystals between source–drain contacts should virtually act like a single crystal. Indeed, the estimated mobility value is in the range of 0.05–0.08 cm 2 V −1 s −1 which is very close to the 0.1 cm 2 V −1 s −1 average value we reported for a single crystal of the same molecule. [ 16 ] In Figure 4 e we show the effect of increasing the number density of the crystallites. The above is achieved by varying the solution concentrations. The increase in the number density of crystals increases the fi ll factor of the channel and hence the current.

The N1 molecule is different in two major ways. First, it forms interconnected crystalline domains, and second its energy levels are different, rendering its contact with gold a nonohmic contact. Indeed, Figure 4 c shows that the linear regime has a diode-like shape, indicating a contact barrier. When using a drain–source voltage that is large enough to overcome the contact resistance ( V DS = 15 V) we fi nd a close to ideal transfer characteristics (full lines in Figure 4 d). Since the N1 morphology is of mostly interconnected crystals there would be current fl owing even before the circular pattern is deposited. Hence, we can study the effect of depositing a cir-cular pattern that forms a Schottky barrier. To this end, we show in Figure 4 d, dotted line, the transfer characteristics of the transistor prior to the deposition of the circular gold pat-tern. The striking difference is that upon deposition of the cir-cular pattern the off-current was reduced by an order of mag-nitude and the threshold voltage shifted toward zero. Both are an indication of dedoping and we attribute this to the depletion formed by the Schottky contacts with the circular pattern. The last attribute of the circular pattern is shown in Figure 4 f. Here we use again a morphology of largely isolated crystals obtained in this case by depositing the N1 molecule on an OTS-coated

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Figure 4. Output and transfer characteristics of organic single crystallite SFETs (OSFETs). Output characteristics ( I DS versus V DS ) for a) P1 OSFET for V G = −2, −10, −16, −20 V and c) N1 OSFET for V G = 2, 10, 16, 20 V. The full lines in (b) and (d) are transfer characteristics for P1 OSFET at b) V DS = −15 V and for N1 OSFET at d) V DS = 15 V. The layout parameters are L = 100 μm; W = 19800 μm; circular pattern size = 24 μm gap = 8 μm. The dotted line in (d) shows the characteristics prior to the deposition of the circular pattern. e) Output characteristics of P1 OSFETs prepared using different solution concentrations. The data are shown for V G = −2 V and −20 V. f) Transfer characteristics of N1 OSFETs prepared using OTS-coated SiO 2 . The data are for OSFETs with pattern having size to gap ratio of 3 (24/8, 18/6) and 6 (30/5, 24/4). The initial fi lms for the P1 in (a) and (b) were spin coated from 1 mg mL −1 and for N1 in (c) from 4 mg mL −1 . For N1 on OTS in (f) 10 mg mL −1 was used.

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SiO 2 and from a high-solution concentration, 10 mg mL −1 (see the inset to Figure 3 f). The data show results for four OSFETs with pattern structure (size, gap) in micrometer being: (18, 6), (24, 8), (24, 4), (30, 5). The results show that the circular pat-tern indeed also acts to reduce the effective length of the channel. When the ratio of size to gap increases the area cov-ered by the metal increases and hence the length the charges have to be transported in the semiconductor (not covered by metal) decreases.

Finally, part of our claim is that the statistical nature of the new transistor structure also ensures performance uniformity. To address this issue we present in Figure 5 statistical analysis of the P1 OSFET devices. In the statistics we included the various process parameters reported above, namely, we used various conducting patterns and several number densities of single crystals. We note the relatively narrow distributions espe-cially when we allowed different processing parameters to enter the statistical analysis.

3. Conclusions

In summary we have presented a new type of transistor archi-tecture that allows for the use of randomly distributed single crystals to provide single-crystal-like performance. As is shown in Supporting Information Figures S4 and S5 we also imple-mented this structure using C60 crystallites and obtained a mobility of 0.3 cm 2 V −1 s −1 , thus demonstrating the generality of the new device structure and its ability to exhibit single-crystal-like performance. By making the contacting of the crys-tals a fabrication step that is independent of the source–drain deposition we gain a new degree of freedom and we showed several implementations. First, one can tune the effective channel length by modifying the conducting pattern. Second, by choosing the conducting material one can affect the doping of the crystals (or dedope them). And lastly, we showed in the Supporting Information (Figure S7, Supporting Information) that the conducting pattern can mitigate the effect of grain boundaries and diminish effects such as hysteresis and high threshold voltage.

We have demonstrated that our technique does not require aligned single crystals nor tedious pick and place or patterning process in order to obtain a single-crystal device. We demon-strated the structure using a certain method of depositing

randomly oriented crystals but the design is not limited to this method and would be compatible with any method that would be chosen to fi t a certain fabrication process. As the circular conducting pattern can be implemented either prior to or fol-lowing the crystals deposition it renders crystal forming mol-ecules compatible with additive manufacturing processes such as printing. In fact, if very high resolution would be required, one may prefer to start with a prepatterned conducting circle as one could use manufacturing methods developed in the touch-screen fi eld which have already achieved submicron reso-lution. [ 12 ] The circuit functionality (source, drain, top gate, and interconnects) could then be printed using a low-resolution method.

Experimental Section Crystal and Device Fabrication : THF was used as solvent for both

molecules. First, solutions (1–10 mg mL −1 ) of P1 and N1 were spin-coated (2000 rpm for 60 s) on n++Si/SiO 2 (100 nm) substrates for AFM measurements and OSFETs. Films were annealed at 150 °C for P1 and at 120 °C for N1 molecules under rough vacuum (10 −2 mbar). 100 nm gold was evaporated for source–drain contacts and transistor measurements were carried out. Gold stencils mask pattern (30–40 nm) was then evaporated on the source–drain area.

Measurements : Surface morphologies were measured with an AFM system (NanoscopeIIIa, Digital Instruments). Dual Beam FIB FE-SEM System (confi guration: FEI STRATA 400S) was used for cross-sectional measurements. SFET measurements were done under inert atmosphere using Agilent 1500A Semiconductor Parameter Analyzer.

Supporting Information Supporting Information is available from the Wiley Online Library or from the author.

Acknowledgements This work was fi nancially supported by CommonSense FP7 grants and by the Technion funds for security research.

Received: September 14, 2015 Revised: November 9, 2015

Published online:

Figure 5. Statistical analysis of the performance of P1 OSFETs prepared using various circular conducting patterns and differing solution concentrations.a) The maximum drain source current measured at gate voltage of −20 V, b) The transisors on/off ratio. c) The threshold voltage.

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