EED Lab Arun

7/31/2019 EED Lab Arun

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Expt. No.1APPLICATIONS OF OP-AMP - I

( INVERTING AND NON INVERTING AMPLIFIER)

1. a. INVERTING AMPLIFIER

AIM:

To design an Inverting Amplifier for the given specifications using Op-Amp IC 741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As required7. Connecting wires and probes As required

THEORY:

The input signal V i is applied to the inverting input terminal through R 1 and thenon-inverting input terminal of the op-amp is grounded. The output voltage V o isfed back to the inverting input terminal through the R f - R1 network, where R f is thefeedback resistor. The output voltage is given as,

Vo = - ACLVi

Here the negative sign indicates that the output voltage is 180 0 out of phase withthe input signal.

PRECAUTIONS:

1. Output voltage will be saturated if it exceeds 15V.

PROCEDURE:

1. Connections are given as per the circuit diagram.


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We know for an inverting Amplifier A CL= RF / R1Assume R 1 (approx. 10 K) and find R f Hence Vo(theoretical) = - ACLVi

OBSERVATIONS:

S.No. Amplitude( No. of div x Volts per div )

Time period( No. of div x Time per div )

InputOutput Theoretical -

Practical -

RESULT:

The design and testing of the inverting amplifier is done and the input and outputwaveforms were drawn.

b. NON - INVERTING AMPLIFIER


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AIM:

To design a Non-Inverting Amplifier for the given specifications using Op-Amp IC741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As required7. Connecting wires and probes As required

THEORY:

The input signal V i is applied to the non - inverting input terminal of the op-amp.This circuit amplifies the signal without inverting the input signal. It is also callednegative feedback system since the output is feedback to the inverting inputterminals. The differential voltage V d at the inverting input terminal of the op-ampis zero ideally and the output voltage is given as,

Vo = ACLVi

Here the output voltage is in phase with the input signal.

PRECAUTIONS:1. Output voltage will be saturated if it exceeds 15V.

PROCEDURE:

1. Connections are given as per the circuit diagram.2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp

IC.3. By adjusting the amplitude and frequency knobs of the function generator,

appropriate input voltage is applied to the non - inverting input terminal of the Op-Amp.

4. The output voltage is obtained in the CRO and the input and output voltagewaveforms are plotted in a graph sheet.

PIN DIAGRAM:


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CIRCUIT DIAGRAM OF NON INVERITNG AMPLIFIER:

DESIGN:

We know for a Non-inverting Amplifier A CL = 1 + (RF / R1)

Assume R 1 ( approx. 10 K ) and find R f Hence Vo = ACL Vi

OBSERVATIONS:



InputOutput Theoretical -

Practical -

RESULT:

The design and testing of the Non-inverting amplifier is done and the input andoutput waveforms were drawn.

APPLICATIONS OF OP-AMP - II
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The differentiator is most commonly used in waveshaping circuits to detect highfrequency components in an input signal and also as a rateofchange detector inFM modulators.

PIN DIAGRAM:

CIRCUIT DIAGRAM OF DIFFERENTIATOR:

DESIGN :
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Given f a = ---------------We know the frequency at which the gain is 0 dB, f a = 1 / (2 R f C1)Let us assume C 1 = 0.1 F; thenRf = _________Since f b = 20 f a, f b = ---------------We know that the gain limiting frequency f b = 1 / (2 R1 C1)Hence R 1 = _________Also since R 1C1 = Rf Cf ; Cf = _________

PROCEDURE:

1. Connections are given as per the circuit diagram.2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp

IC.3. By adjusting the amplitude and frequency knobs of the function generator,

appropriate input voltage is applied to the inverting input terminal of theOp-Amp.


OBSERVATIONS:

Input - Sine wave



InputOutput

Input Square wave



InputOutput

RESULT:The design of the Differentiator circuit was done and the input and outputwaveforms were obtained.

INTEGRATOR


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Obtain the output of an Integrator circuit with component values R 1Cf = 0.1ms, Rf =10 R1 and C f = 0.01 F , if 2 V peak to peak square wave at 1000Hz is applied asinput.

AIM:

To design an Integrator circuit for the given specifications using Op-Amp IC 741.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors7. Capacitors8. Connecting wires and probes As required

THEORY:

A circuit in which the output voltage waveform is the integral of the input voltagewaveform is the integrator. Such a circuit is obtained by using a basic invertingamplifier configuration if the feedback resistor R f is replaced by a capacitor C f .The expression for the output voltage is given as,

Vo = - (1/Rf C1) Vi dt

Here the negative sign indicates that the output voltage is 180 0 out of phase withthe input signal. Normally between f a and f b the circuit acts as an integrator.Generally, the value of f a < f b . The input signal will be integrated properly if theTime period T of the signal is larger than or equal to R f Cf . That is,

T Rf Cf

The integrator is most commonly used in analog computers and ADC and signal-wave shaping circuits.

PIN DIAGRAM:


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CIRCUIT DIAGRAM OF INTEGRATOR:

DESIGN:We know the frequency at which the gain is 0 dB, f b = 1 / (2 R1 Cf )Therefore f b = _____
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Since f b = 10 f a, and also the gain limiting frequency f a = 1 / (2 R f Cf )We get, R f = _______ and hence R 1 = __________

PROCEDURE:Connections are given as per the circuit diagram.

1. + Vcc and - Vcc supply is given to the power supply terminal of the Op-AmpIC.

2. By adjusting the amplitude and frequency knobs of the function generator,appropriate input voltage is applied to the inverting input terminal of theOp-Amp.


OBSERVATIONS:

S.No. Amplitude( No. of div x Volts per div ) Time period( No. of div x Time per div )InputOutput

RESULT:

The design of the Integrator circuit was done and the input and output waveformswere obtained.

TIMER IC APPLICATIONS - I(ASTABLE MULTIVIBRATOR)

Design an astable multivibrator with 65% duty cycle at 4 KHz frequency, assumeC= 0.01 F.[Design can be changed by changing the Duty cycle and frequency] AIM:

To design an astable multivibrator circuit for the given specifications using 555Timer IC.

APPARATUS REQUIRED:

S.No

Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Timer IC IC 555 1


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5. Bread Board 16. Resistors7. Capacitors8. Connecting wires and probes As required

THEORY:An astable multivibrator, often called a free-running multivibrator, is a rectangular-wave-generating circuit. This circuit do not require an external trigger to changethe state of the output. The time during which the output is either high or low isdetermined by two resistors and a capacitor, which are connected externally tothe 555 timer. The time during which the capacitor charges from 1/3 V cc to 2/3 Vccis equal to the time the output is high and is given by,

tc = 0.69 (R1 + R2) C

Similarly the time during which the capacitor discharges from 2/3 V cc to 1/3 Vcc isequal to the time the output is low and is given by,

td = 0.69 (R2) C

Thus the total time period of the output waveform is,

T = tc + td = 0.69 (R1 + 2 R2) C

The term duty cycle is often used in conjunction with the astable multivibrator.The duty cycle is the ratio of the time t c during which the output is high to the totaltime period T. It is generally expressed in percentage. In equation form,

% duty cycle = [(R1 + R2) / (R1 + 2 R2)] x 100

PIN DIAGRAM:
http://1.bp.blogspot.com/-safVILa8jNM/TZpZHPZX11I/AAAAAAAAAPA/YOGEwyfnDMc/s1600/1.JPG


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CIRCUIT DIAGRAM OF ASTABLE MULTIVIBRATOR

DESIGN:
http://4.bp.blogspot.com/--1L66Qyhr8M/TZpZQO3XvBI/AAAAAAAAAPI/O_iGFotn50M/s1600/2.JPG


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Given f= 4 KHz,Therefore, Total time period, T = 1/f = ____________

We know, duty cycle = t c / TTherefore, t c = ------------------------ and t d = ____________

We also know for an astable multivibrator td = 0.69 (R2) C

Therefore, R 2 = _____________

tc = 0.69 (R1 + R2) CTherefore, R 1 = _____________

PROCEDURE:

1. Connections are given as per the circuit diagram.2. + 5V supply is given to the + V cc terminal of the timer IC.3. At pin 3 the output waveform is observed with the help of a CRO4. At pin 6 the capacitor voltage is obtained in the CRO and the V 0 and Vc

voltage waveforms are plotted in a graph sheet.

OBSERVATIONS:

S.No WaveformsAmplitude

( No. of div xVolts per div )

Time period

( No. of div xTime per div )

tc td

1. Output Voltage , V o

2. Capacitor voltage , V c

RESULT:


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The design of the Astable multivibrator circuit was done and the output voltageand capacitor voltage waveforms were obtained.

TIMER IC APPLICATIONS -II( MONOSTABLE MULTIVIBRATOR)

To design a monostable multivibrator with t p = 0.616 ms , assume C = 0.01 F

AIM:

To design a monostable multivibrator for the given specifications using 555 Timer IC.

APPARATUS REQUIRED:

S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz, Analog 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Timer IC IC 555 15. Bread Board 16. Resistors7. Capacitors8. Connecting wires and probes As required

THEORY:

A monostable multivibrator often called a one-shot multivibrator is a pulsegenerating circuit in which the duration of the pulse is determined by the RCnetwork connected externally to the 555 timer. In a stable or stand-by state theoutput of the circuit is approximately zero or at logic low level. When an externaltrigger pulse is applied, the output is forced to go high (approx. V cc). The timeduring which the output remains high is given by,

tp = 1.1 R1 C

At the end of the timing interval, the output automatically reverts back to its logiclow state. The output stays low until a trigger pulse is applied again. Then thecycle repeats.Thus the monostable state has only one stable state hence the name monostable.


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Given tp = 0.616 ms = 1.1 R1 CTherefore, R 1 = _____________

PROCEDURE:

1. Connections are given as per the circuit diagram.2. + 5V supply is given to the + V cc terminal of the timer IC.3. A negative trigger pulse of 5V, 2 KHz is applied to pin 2 of the 555 IC4. At pin 3 the output waveform is observed with the help of a CRO5. At pin 6 the capacitor voltage is obtained in the CRO and the V 0 and Vc

voltage waveforms are plotted in a graph sheet.

OBSERVATIONS:

S.NoAmplitude

( No. of div xVolts per div )

Time period( No. of div xTime per div )

ton toff

1. Trigger input

2. Output Voltage , V o

3. Capacitor voltage , V c

RESULT:

The design of the Monostable multivibrator circuit was done and the input andoutput waveforms were obtained.

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